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Merge branch 'fix/fix_esp32p4_missing_pvt_clock' into 'master'

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fix(esp_hw_support): fix esp32p4 PVT clock lost

See merge request espressif/esp-idf!51756
This commit is contained in:
Jiang Jiang Jian
2026-08-19 16:12:21 +08:00
parent 76a34b3f85 2c4ad9caad
commit 8c301616f8
1 changed files with 6 additions and 0 deletions
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components/esp_hw_support/port/esp32p4/esp_clk_tree.c
+6
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@@ -189,7 +189,10 @@ void esp_clk_tree_initialize(void)
_clk_gate_ll_ref_50m_clk_en(false);
_clk_gate_ll_ref_80m_clk_en(false);
_clk_gate_ll_ref_120m_clk_en(false);
#if !CONFIG_ESP_ENABLE_PVT
// PLL_F160M must always on if PVT is enabled.
_clk_gate_ll_ref_160m_clk_en(false);
#endif
_clk_gate_ll_ref_240m_clk_en(false);
s_clk_tree_initialized = true;
}
@@ -315,7 +318,10 @@ esp_err_t esp_clk_tree_enable_src(soc_module_clk_t clk_src, bool enable)
case SOC_MOD_CLK_PLL_F25M: gated_clk_id = ESP_CLK_TREE_GATED_CLK_PLL_F25M; break;
case SOC_MOD_CLK_PLL_F80M: gated_clk_id = ESP_CLK_TREE_GATED_CLK_PLL_F80M; break;
case SOC_MOD_CLK_PLL_F120M: gated_clk_id = ESP_CLK_TREE_GATED_CLK_PLL_F120M; break;
#if !CONFIG_ESP_ENABLE_PVT
// PLL_F160M must always on if PVT is enabled.
case SOC_MOD_CLK_PLL_F160M: gated_clk_id = ESP_CLK_TREE_GATED_CLK_PLL_F160M; break;
#endif
case SOC_MOD_CLK_PLL_F240M: gated_clk_id = ESP_CLK_TREE_GATED_CLK_PLL_F240M; break;
default:
// Derived PLL clocks (PLL_F50M, ...) that participate in the shared