feat(sha): add sha_hal_is_sm3_supported()

Report whether the SHA peripheral can run the SM3 mode. The LL function
sha_ll_is_sm3_supported() exists on every chip. ESP32-S31 reads the
DIS_SM_CRYPT eFuse, which disables SM2 and SM3 permanently. ESP32-C5 and
ESP32-H4 have SM3 but no such eFuse. All other chips have no SM3.
This commit is contained in:
Ashish Sharma
2026-09-04 14:26:23 +08:00
parent 7f413c914d
commit 8956f3b86c
15 changed files with 185 additions and 13 deletions
+13 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -189,6 +189,18 @@ static inline void sha_ll_t_len_set(uint8_t t_len)
REG_WRITE(SHA_T_LENGTH_REG, t_len);
}
/**
* @brief Check whether the SHA peripheral can run the SM3 mode.
*
* This chip has no eFuse that disables SM3, so the mode is always available.
*
* @return true
*/
static inline bool sha_ll_is_sm3_supported(void)
{
return true;
}
#ifdef __cplusplus
}
#endif