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docs(esp_psram): clarify carve-out location is at upper end of PSRAM

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The previous wording "top of PSRAM" was ambiguous: the carve-out is
actually mapped at the highest physical addresses of PSRAM (after the
rodata, text, and main heap mappings). Update the Kconfig help text for
SPIRAM_ENC_EXEMPT and SPIRAM_ENC_EXEMPT_SIZE, the External RAM
documentation, and the internal layout comment to say "upper end of PSRAM
(highest physical addresses)" instead.
This commit is contained in:
Mahavir Jain
2026-05-21 20:54:31 +05:30
parent ef7192fc73
commit 77e85b886a
3 changed files with 8 additions and 6 deletions
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components/esp_psram/Kconfig.spiram.common
+6 -4
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@@ -164,8 +164,9 @@ config SPIRAM_ENC_EXEMPT
help help
!!! SECURITY WARNING !!! !!! SECURITY WARNING !!!
Enabling this option carves out a region at the top of PSRAM that is mapped Enabling this option carves out a region at the upper end of PSRAM (highest
WITHOUT encryption, even when flash encryption is enabled. Memory allocated physical addresses) that is mapped WITHOUT encryption, even when flash
encryption is enabled. Memory allocated
from this region (via MALLOC_CAP_SPIRAM_NO_ENC) is stored in plaintext in from this region (via MALLOC_CAP_SPIRAM_NO_ENC) is stored in plaintext in
PSRAM and can be observed by an attacker with physical access to the PSRAM PSRAM and can be observed by an attacker with physical access to the PSRAM
interface. interface.
@@ -189,7 +190,8 @@ config SPIRAM_ENC_EXEMPT_SIZE
range 64 65536 range 64 65536
depends on SPIRAM_ENC_EXEMPT depends on SPIRAM_ENC_EXEMPT
help help
Size of the PSRAM region carved out at the top of PSRAM and mapped without Size of the PSRAM region carved out at the upper end of PSRAM (highest
encryption. Rounded up to a multiple of the MMU page size (typically 64 KB). physical addresses) and mapped without encryption. Rounded up to a multiple
of the MMU page size (typically 64 KB).
The region is registered as a separate heap pool, accessible only via The region is registered as a separate heap pool, accessible only via
MALLOC_CAP_SPIRAM_NO_ENC. MALLOC_CAP_SPIRAM_NO_ENC.
components/esp_psram/system_layer/esp_psram.c
+1 -1
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@@ -52,7 +52,7 @@
* PSRAM memory regions: * PSRAM memory regions:
* - 8bit aligned * - 8bit aligned
* - 32bit aligned * - 32bit aligned
* - Optional: encryption-exempt carve-out (top of PSRAM) * - Optional: encryption-exempt carve-out (upper end of PSRAM, highest physical addresses)
*/ */
#define PSRAM_MEM_8BIT_ALIGNED 0 #define PSRAM_MEM_8BIT_ALIGNED 0
#define PSRAM_MEM_32BIT_ALIGNED 1 #define PSRAM_MEM_32BIT_ALIGNED 1
docs/en/api-guides/external-ram.rst
+1 -1
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@@ -252,7 +252,7 @@ By default, failure to initialize external RAM will cause the ESP-IDF startup to
Reserving an Unencrypted PSRAM Region Reserving an Unencrypted PSRAM Region
------------------------------------- -------------------------------------
Enabling :ref:`CONFIG_SPIRAM_ENC_EXEMPT` reserves a region at the top of PSRAM (sized by :ref:`CONFIG_SPIRAM_ENC_EXEMPT_SIZE`, in KB, rounded up to the MMU page size) that is mapped without encryption. This region is registered as a separate heap pool reachable only via the ``MALLOC_CAP_SPIRAM_NO_ENC`` capability. The rest of PSRAM (and flash) remains encrypted. Enabling :ref:`CONFIG_SPIRAM_ENC_EXEMPT` reserves a region at the upper end of PSRAM (highest physical addresses; sized by :ref:`CONFIG_SPIRAM_ENC_EXEMPT_SIZE`, in KB, rounded up to the MMU page size) that is mapped without encryption. This region is registered as a separate heap pool reachable only via the ``MALLOC_CAP_SPIRAM_NO_ENC`` capability. The rest of PSRAM (and flash) remains encrypted.
.. warning:: .. warning::