From 77e85b886ad92f98940ed352a311ce807d22b7bd Mon Sep 17 00:00:00 2001 From: Mahavir Jain Date: Wed, 20 May 2026 10:28:17 +0530 Subject: [PATCH] docs(esp_psram): clarify carve-out location is at upper end of PSRAM The previous wording "top of PSRAM" was ambiguous: the carve-out is actually mapped at the highest physical addresses of PSRAM (after the rodata, text, and main heap mappings). Update the Kconfig help text for SPIRAM_ENC_EXEMPT and SPIRAM_ENC_EXEMPT_SIZE, the External RAM documentation, and the internal layout comment to say "upper end of PSRAM (highest physical addresses)" instead. --- components/esp_psram/Kconfig.spiram.common | 10 ++++++---- components/esp_psram/system_layer/esp_psram.c | 2 +- docs/en/api-guides/external-ram.rst | 2 +- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/components/esp_psram/Kconfig.spiram.common b/components/esp_psram/Kconfig.spiram.common index 7273e090efc..dad17a34447 100644 --- a/components/esp_psram/Kconfig.spiram.common +++ b/components/esp_psram/Kconfig.spiram.common @@ -164,8 +164,9 @@ config SPIRAM_ENC_EXEMPT help !!! SECURITY WARNING !!! - Enabling this option carves out a region at the top of PSRAM that is mapped - WITHOUT encryption, even when flash encryption is enabled. Memory allocated + Enabling this option carves out a region at the upper end of PSRAM (highest + physical addresses) that is mapped WITHOUT encryption, even when flash + encryption is enabled. Memory allocated from this region (via MALLOC_CAP_SPIRAM_NO_ENC) is stored in plaintext in PSRAM and can be observed by an attacker with physical access to the PSRAM interface. @@ -189,7 +190,8 @@ config SPIRAM_ENC_EXEMPT_SIZE range 64 65536 depends on SPIRAM_ENC_EXEMPT help - Size of the PSRAM region carved out at the top of PSRAM and mapped without - encryption. Rounded up to a multiple of the MMU page size (typically 64 KB). + Size of the PSRAM region carved out at the upper end of PSRAM (highest + physical addresses) and mapped without encryption. Rounded up to a multiple + of the MMU page size (typically 64 KB). The region is registered as a separate heap pool, accessible only via MALLOC_CAP_SPIRAM_NO_ENC. diff --git a/components/esp_psram/system_layer/esp_psram.c b/components/esp_psram/system_layer/esp_psram.c index d388e671eec..8c1c7e29545 100644 --- a/components/esp_psram/system_layer/esp_psram.c +++ b/components/esp_psram/system_layer/esp_psram.c @@ -52,7 +52,7 @@ * PSRAM memory regions: * - 8bit aligned * - 32bit aligned - * - Optional: encryption-exempt carve-out (top of PSRAM) + * - Optional: encryption-exempt carve-out (upper end of PSRAM, highest physical addresses) */ #define PSRAM_MEM_8BIT_ALIGNED 0 #define PSRAM_MEM_32BIT_ALIGNED 1 diff --git a/docs/en/api-guides/external-ram.rst b/docs/en/api-guides/external-ram.rst index 3e0602493c2..395fc0dc76a 100644 --- a/docs/en/api-guides/external-ram.rst +++ b/docs/en/api-guides/external-ram.rst @@ -252,7 +252,7 @@ By default, failure to initialize external RAM will cause the ESP-IDF startup to Reserving an Unencrypted PSRAM Region ------------------------------------- - Enabling :ref:`CONFIG_SPIRAM_ENC_EXEMPT` reserves a region at the top of PSRAM (sized by :ref:`CONFIG_SPIRAM_ENC_EXEMPT_SIZE`, in KB, rounded up to the MMU page size) that is mapped without encryption. This region is registered as a separate heap pool reachable only via the ``MALLOC_CAP_SPIRAM_NO_ENC`` capability. The rest of PSRAM (and flash) remains encrypted. + Enabling :ref:`CONFIG_SPIRAM_ENC_EXEMPT` reserves a region at the upper end of PSRAM (highest physical addresses; sized by :ref:`CONFIG_SPIRAM_ENC_EXEMPT_SIZE`, in KB, rounded up to the MMU page size) that is mapped without encryption. This region is registered as a separate heap pool reachable only via the ``MALLOC_CAP_SPIRAM_NO_ENC`` capability. The rest of PSRAM (and flash) remains encrypted. .. warning::