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fix(esp_system): report ESP32-S3 PMS violations as memory protection faults

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On Xtensa the PMS violation shares ETS_MEMACCESS_ERR_INUM with the cache error
and arrives as PANIC_RSN_CACHEERR. ESP32-S2 tells the two apart, ESP32-S3 never
did (//MV note in dd938eb95), so PMS faults were reported as "Cache error".

panic_memprot_fill_info() now claims the panic only when
esp_mprot_get_active_intr() reports a pending violation, and the ESP32-S3 cache
error path consults it, falling back to the cache error report as before.
RISC-V has a dedicated interrupt, so its reporting stays unconditional.
ESP32-S2 and ESP32 are untouched.
This commit is contained in:
harshal.patil
2026-08-26 15:05:02 +05:30
parent 9a201cdd1e
commit 73dd203204
2 changed files with 21 additions and 10 deletions
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19
components/esp_system/port/arch/xtensa/panic_arch.c
View File

@@ -20,12 +20,8 @@
#if !CONFIG_IDF_TARGET_ESP32
#include "soc/rtc_cntl_reg.h"
#if CONFIG_ESP_SYSTEM_MEMPROT && CONFIG_ESP_SYSTEM_MEMPROT_PMS
#ifdef CONFIG_IDF_TARGET_ESP32S2
#if CONFIG_ESP_SYSTEM_MEMPROT && CONFIG_ESP_SYSTEM_MEMPROT_PMS && CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/memprot.h"
#else
#include "esp_memprot.h"
#endif
#endif
#endif // CONFIG_IDF_TARGET_ESP32
@@ -302,15 +298,20 @@ void panic_soc_fill_info(void *f, panic_info_t *info)
info->exception = PANIC_EXCEPTION_DEBUG;
}
//MV note: ESP32S3 PMS handling?
if (frame->exccause == PANIC_RSN_CACHEERR) {
#if CONFIG_ESP_SYSTEM_MEMPROT && CONFIG_ESP_SYSTEM_MEMPROT_PMS && CONFIG_IDF_TARGET_ESP32S2
bool memprot_fault = false;
#if CONFIG_ESP_SYSTEM_MEMPROT && CONFIG_ESP_SYSTEM_MEMPROT_PMS
#if CONFIG_IDF_TARGET_ESP32S2
if (esp_memprot_is_intr_ena_any()) {
info->details = print_memprot_err_details;
info->reason = "Memory protection fault";
} else
memprot_fault = true;
}
#else
memprot_fault = panic_memprot_fill_info(info);
#endif
{
#endif
if (!memprot_fault) {
info->details = print_cache_err_details;
}
}

12
components/esp_system/port/panic_memprot.c
View File

@@ -79,9 +79,19 @@ static void print_memprot_err_details(const void *frame __attribute__((unused)))
bool panic_memprot_fill_info(panic_info_t *info)
{
const bool violation_pending = esp_mprot_get_active_intr(&s_memp_intr) == ESP_OK &&
s_memp_intr.mem_type != MEMPROT_TYPE_NONE &&
s_memp_intr.mem_type != MEMPROT_TYPE_INVALID;
#if CONFIG_IDF_TARGET_ARCH_XTENSA
if (!violation_pending) {
return false;
}
#endif
info->reason = "Memory protection fault";
info->details = print_memprot_err_details;
info->core = esp_mprot_get_active_intr(&s_memp_intr) == ESP_OK ? s_memp_intr.core : -1;
info->core = violation_pending ? s_memp_intr.core : -1;
return true;
}