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Merge branch 'fix/handle_shared_intr' into 'master'
Fix/handle shared intr Closes IDF-12904 See merge request espressif/esp-idf!43149
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@@ -34,6 +34,8 @@ extern "C" {
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#define LEDC_LL_FRACTIONAL_BITS (8)
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#define LEDC_LL_FRACTIONAL_MAX ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
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#define LEDC_LL_GLOBAL_CLOCKS SOC_LEDC_CLKS
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/// Get the mask of the fade end interrupt status register.
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#define LEDC_LL_FADE_END_INTR_MASK (0xffUL << LEDC_DUTY_CHNG_END_CH0_INT_ENA_S)
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// Channel tasks: ID, enable register and bit
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#define LEDC_LL_ETM_CHANNEL_TASK_ID(group, channel, task) \
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@@ -569,7 +571,6 @@ static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_m
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*
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* @param hw Beginning address of the peripheral registers
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* @param speed_mode LEDC speed_mode, low-speed mode only
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* @param channel_num LEDC channel index (0-7), select from ledc_channel_t
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* @param intr_status The fade end interrupt status
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*
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* @return None
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@@ -581,6 +582,18 @@ static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t
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*intr_status = (value >> int_en_base) & 0xff;
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}
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/**
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* @brief Get the address of the fade end interrupt status register.
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*
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* @param hw Beginning address of the peripheral registers
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* @return Pointer to the fade end interrupt status register.
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*/
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static inline volatile void* ledc_ll_get_fade_end_intr_addr(ledc_dev_t *hw)
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{
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return &hw->int_st.val;
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}
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/**
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* @brief Clear fade end interrupt status
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*
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@@ -350,6 +350,11 @@ FORCE_INLINE_ATTR uint32_t uart_ll_get_intsts_mask(uart_dev_t *hw)
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return hw->int_st.val;
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}
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FORCE_INLINE_ATTR volatile void* uart_ll_get_intr_status_reg(uart_dev_t *hw)
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{
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return &hw->int_st.val;
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}
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/**
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* @brief Clear the UART interrupt status based on the given mask.
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*
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