change(esp_hw_support): change some modem clock related macros

2026-08-18 06:35:35 +03:00 · 2025-12-23 19:24:53 +08:00
parent 75fd8e7a80
commit 6f3dca9cb5
24 changed files with 51 additions and 30 deletions
--- a/components/esp_hw_support/CMakeLists.txt
+++ b/components/esp_hw_support/CMakeLists.txt
@@ -107,7 +107,7 @@ if(NOT non_os_build)
                         "port/regdma_link.c")
    endif()

-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+    if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
        list(APPEND srcs "modem_clock.c")
    endif()

--- a/components/esp_hw_support/include/esp_private/esp_modem_clock.h
+++ b/components/esp_hw_support/include/esp_private/esp_modem_clock.h
@@ -17,7 +17,7 @@
 #include "esp_private/esp_pmu.h"
 #include "esp_private/critical_section.h"

-#if SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED
+#if SOC_MODEM_CLOCK_SUPPORTED
 #include "hal/modem_clock_hal.h"
 #endif

@@ -25,7 +25,7 @@
 extern "C" {
 #endif

-#if SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED
+#if SOC_MODEM_CLOCK_SUPPORTED
 // Please define the frequently called modules in the low bit,
 // which will improve the execution efficiency
 typedef enum {
@@ -76,7 +76,7 @@ typedef struct modem_clock_context {
    modem_clock_hal_context_t *hal;
    spinlock_t                lock;
    modem_clock_device_context_t *dev;
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
    const uint8_t *initial_gating_mode;
 #endif
    /* the low-power clock source for each module */
@@ -100,22 +100,20 @@ uint32_t modem_clock_get_module_deps(shared_periph_module_t module);
 */
 extern modem_clock_device_context_t g_modem_clock_dev[MODEM_CLOCK_DEVICE_MAX];

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
 /**
 * @brief Initial gating mode for each clock domain
 * Each chip defines this array in its port file
 */
 extern const uint8_t g_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX];
-#endif

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
 /* the ICG code's bit 0, 1 and 2 indicates the ICG state
 * of pmu SLEEP, MODEM and ACTIVE mode respectively */
 #define ICG_NOGATING_ACTIVE (BIT(PMU_HP_ICG_MODEM_CODE_ACTIVE))
 #define ICG_NOGATING_SLEEP  (BIT(PMU_HP_ICG_MODEM_CODE_SLEEP))
 #define ICG_NOGATING_MODEM  (BIT(PMU_HP_ICG_MODEM_CODE_MODEM))
-#endif // SOC_PM_SUPPORT_PMU_MODEM_STATE
-#endif // SOC_MODEM_CLOCK_IS_INDEPENDENT && SOC_MODEM_CLOCK_SUPPORTED
+#endif // SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
+#endif // SOC_MODEM_CLOCK_SUPPORTED

 /**
 * @brief Enable the clock of modem module
@@ -215,7 +213,7 @@ void modem_clock_deselect_lp_clock_source(shared_periph_module_t module);
 */
 void modem_clock_deselect_all_module_lp_clock_source(void);

-#if CONFIG_IDF_TARGET_ESP32H2
+#if SOC_MODEM_CLOCK_BLE_RTC_TIMER_WORKAROUND
 /**
 * @brief BLE RTC timer LPCLK workaround on ESP32H2
 *
--- a/components/esp_hw_support/modem_clock.c
+++ b/components/esp_hw_support/modem_clock.c
@@ -28,7 +28,7 @@ modem_clock_context_t * __attribute__((weak)) IRAM_ATTR MODEM_CLOCK_instance(voi
    static DRAM_ATTR modem_clock_context_t modem_clock_context = {
        .hal = &modem_clock_hal, .lock = SPINLOCK_INITIALIZER,
        .dev = g_modem_clock_dev,
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
        .initial_gating_mode = g_initial_gating_mode,
 #endif
        .lpclk_src = { [0 ... PERIPH_MODEM_MODULE_NUM - 1] = MODEM_CLOCK_LPCLK_SRC_INVALID }
@@ -116,7 +116,7 @@ void IRAM_ATTR modem_clock_module_mac_reset(shared_periph_module_t module)
    esp_os_exit_critical_safe(&ctx->lock);
 }

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
 static IRAM_ATTR void modem_clock_module_icg_map_init_all(void)
 {
    esp_os_enter_critical_safe(&MODEM_CLOCK_instance()->lock);
@@ -134,7 +134,7 @@ static IRAM_ATTR void modem_clock_module_icg_map_init_all(void)
 void IRAM_ATTR modem_clock_module_enable(shared_periph_module_t module)
 {
    assert(IS_MODEM_MODULE(module));
-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
    modem_clock_module_icg_map_init_all();
 #endif
    uint32_t deps = modem_clock_get_module_deps(module);
@@ -211,22 +211,20 @@ void modem_clock_select_lp_clock_source(shared_periph_module_t module, modem_clo

 #if SOC_BT_SUPPORTED
    case PERIPH_BT_MODULE:
-    {
-#if CONFIG_IDF_TARGET_ESP32H2
+#if SOC_MODEM_CLOCK_BLE_RTC_TIMER_WORKAROUND
        modem_clock_select_ble_rtc_timer_clk_workaround(MODEM_CLOCK_instance(), true, src);
 #endif
        modem_clock_hal_deselect_all_ble_rtc_timer_lpclk_source(MODEM_CLOCK_instance()->hal);
        modem_clock_hal_select_ble_rtc_timer_lpclk_source(MODEM_CLOCK_instance()->hal, src);
        modem_clock_hal_set_ble_rtc_timer_divisor_value(MODEM_CLOCK_instance()->hal, divider);
        modem_clock_hal_enable_ble_rtc_timer_clock(MODEM_CLOCK_instance()->hal, true);
-#if CONFIG_IDF_TARGET_ESP32H2
+#if SOC_MODEM_CLOCK_BLE_RTC_TIMER_WORKAROUND
        modem_clock_select_ble_rtc_timer_clk_workaround(MODEM_CLOCK_instance(), false, src);
 #endif
 #if SOC_BLE_USE_WIFI_PWR_CLK_WORKAROUND
        modem_clock_bt_wifipwr_clk_workaround(MODEM_CLOCK_instance(), true, src);
 #endif
        break;
-    }
 #endif // SOC_BT_SUPPORTED

    case PERIPH_COEX_MODULE:
--- a/components/esp_hw_support/port/esp32c5/CMakeLists.txt
+++ b/components/esp_hw_support/port/esp32c5/CMakeLists.txt
@@ -13,7 +13,7 @@ set(srcs "rtc_clk_init.c"
 if(NOT non_os_build)
    list(APPEND srcs "sar_periph_ctrl.c")

-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+    if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
        list(APPEND srcs "modem_clock_impl.c")
    endif()
 endif()
--- a/components/esp_hw_support/port/esp32c5/modem_clock_impl.c
+++ b/components/esp_hw_support/port/esp32c5/modem_clock_impl.c
@@ -348,7 +348,7 @@ DRAM_ATTR modem_clock_device_context_t g_modem_clock_dev[MODEM_CLOCK_DEVICE_MAX]
    }
 };

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
 const DRAM_ATTR uint8_t g_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = {
    [MODEM_CLOCK_DOMAIN_MODEM_APB]      = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
    [MODEM_CLOCK_DOMAIN_MODEM_PERIPH]   = ICG_NOGATING_ACTIVE,
--- a/components/esp_hw_support/port/esp32c6/CMakeLists.txt
+++ b/components/esp_hw_support/port/esp32c6/CMakeLists.txt
@@ -13,7 +13,7 @@ set(srcs "rtc_clk_init.c"
 if(NOT non_os_build)
    list(APPEND srcs "sar_periph_ctrl.c")

-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+    if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
        list(APPEND srcs "modem_clock_impl.c")
    endif()
 endif()
--- a/components/esp_hw_support/port/esp32c6/modem_clock_impl.c
+++ b/components/esp_hw_support/port/esp32c6/modem_clock_impl.c
@@ -348,8 +348,8 @@ DRAM_ATTR modem_clock_device_context_t g_modem_clock_dev[MODEM_CLOCK_DEVICE_MAX]
    }
 };

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
-const DRAM_ATTR uint8_t g_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = {
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
+static const DRAM_ATTR uint32_t s_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = {
    [MODEM_CLOCK_DOMAIN_MODEM_APB]      = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
    [MODEM_CLOCK_DOMAIN_MODEM_PERIPH]   = ICG_NOGATING_ACTIVE,
    [MODEM_CLOCK_DOMAIN_WIFI]           = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
--- a/components/esp_hw_support/port/esp32c61/CMakeLists.txt
+++ b/components/esp_hw_support/port/esp32c61/CMakeLists.txt
@@ -13,7 +13,7 @@ set(srcs "rtc_clk_init.c"
 if(NOT non_os_build)
    list(APPEND srcs "sar_periph_ctrl.c")

-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+    if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
        list(APPEND srcs "modem_clock_impl.c")
    endif()
 endif()
--- a/components/esp_hw_support/port/esp32c61/modem_clock_impl.c
+++ b/components/esp_hw_support/port/esp32c61/modem_clock_impl.c
@@ -348,7 +348,7 @@ DRAM_ATTR modem_clock_device_context_t g_modem_clock_dev[MODEM_CLOCK_DEVICE_MAX]
    }
 };

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
 const DRAM_ATTR uint8_t g_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = {
    [MODEM_CLOCK_DOMAIN_MODEM_APB]      = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
    [MODEM_CLOCK_DOMAIN_MODEM_PERIPH]   = ICG_NOGATING_ACTIVE,
--- a/components/esp_hw_support/port/esp32h2/CMakeLists.txt
+++ b/components/esp_hw_support/port/esp32h2/CMakeLists.txt
@@ -13,7 +13,7 @@ if(NOT non_os_build)
    list(APPEND srcs "sar_periph_ctrl.c")
 endif()

-if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
    list(APPEND srcs "modem_clock_impl.c")
 endif()

--- a/components/esp_hw_support/port/esp32h21/CMakeLists.txt
+++ b/components/esp_hw_support/port/esp32h21/CMakeLists.txt
@@ -11,7 +11,7 @@ if(CONFIG_SOC_PMU_SUPPORTED)
        )
 endif()

-if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
    list(APPEND srcs "modem_clock_impl.c")
 endif()

--- a/components/esp_hw_support/port/esp32h4/CMakeLists.txt
+++ b/components/esp_hw_support/port/esp32h4/CMakeLists.txt
@@ -15,7 +15,7 @@ endif()
 if(NOT BOOTLOADER_BUILD)
    # list(APPEND srcs "sar_periph_ctrl.c") // TODO: [ESP32H4] IDF-12368

-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
+    if(CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
        list(APPEND srcs "modem_clock_impl.c")
    endif()
 endif()
--- a/components/esp_hw_support/port/esp32h4/modem_clock_impl.c
+++ b/components/esp_hw_support/port/esp32h4/modem_clock_impl.c
@@ -253,7 +253,7 @@ DRAM_ATTR modem_clock_device_context_t g_modem_clock_dev[MODEM_CLOCK_DEVICE_MAX]
    }
 };

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
 const DRAM_ATTR uint8_t g_initial_gating_mode[MODEM_CLOCK_DOMAIN_MAX] = {
    [MODEM_CLOCK_DOMAIN_MODEM_APB]      = ICG_NOGATING_ACTIVE | ICG_NOGATING_MODEM,
    [MODEM_CLOCK_DOMAIN_MODEM_PERIPH]   = ICG_NOGATING_ACTIVE,
--- a/components/hal/include/hal/modem_clock_hal.h
+++ b/components/hal/include/hal/modem_clock_hal.h
@@ -24,7 +24,7 @@ typedef struct {
    modem_lpcon_dev_t  *lpcon_dev;
 } modem_clock_hal_context_t;

-#if SOC_PM_SUPPORT_PMU_MODEM_STATE
+#if SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
 void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain, uint32_t bitmap);
 uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain);
 #endif
--- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
@@ -1423,6 +1423,10 @@ config SOC_PM_SUPPORT_PMU_CLK_ICG
    bool
    default y

+config SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
+    bool
+    default y
+
 config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
    bool
    default y
--- a/components/soc/esp32c5/include/soc/soc_caps.h
+++ b/components/soc/esp32c5/include/soc/soc_caps.h
@@ -579,6 +579,7 @@
 #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE

 #define SOC_PM_SUPPORT_PMU_CLK_ICG          (1)
+#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG      (1)

 #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY   (1) /*!<Supports CRC only the stub code in RTC memory */

--- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
@@ -1175,6 +1175,10 @@ config SOC_PM_SUPPORT_PMU_CLK_ICG
    bool
    default y

+config SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
+    bool
+    default y
+
 config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
    bool
    default y
--- a/components/soc/esp32c6/include/soc/soc_caps.h
+++ b/components/soc/esp32c6/include/soc/soc_caps.h
@@ -484,6 +484,7 @@
 #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE

 #define SOC_PM_SUPPORT_PMU_CLK_ICG          (1)
+#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG      (1)

 #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY   (1) /*!<Supports CRC only the stub code in RTC memory */

--- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
@@ -1079,6 +1079,10 @@ config SOC_PM_SUPPORT_PMU_CLK_ICG
    bool
    default y

+config SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
+    bool
+    default y
+
 config SOC_PM_CPU_RETENTION_BY_SW
    bool
    default y
--- a/components/soc/esp32c61/include/soc/soc_caps.h
+++ b/components/soc/esp32c61/include/soc/soc_caps.h
@@ -444,6 +444,7 @@
 #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE

 #define SOC_PM_SUPPORT_PMU_CLK_ICG          (1)
+#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG      (1)

 #define SOC_PM_CPU_RETENTION_BY_SW          (1)
 #define SOC_PM_MODEM_RETENTION_BY_REGDMA    (1)
--- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
@@ -1223,6 +1223,10 @@ config SOC_MODEM_CLOCK_IS_INDEPENDENT
    bool
    default y

+config SOC_MODEM_CLOCK_BLE_RTC_TIMER_WORKAROUND
+    bool
+    default y
+
 config SOC_RCC_IS_INDEPENDENT
    bool
    default y
--- a/components/soc/esp32h2/include/soc/soc_caps.h
+++ b/components/soc/esp32h2/include/soc/soc_caps.h
@@ -523,6 +523,7 @@
 #define SOC_CLK_LP_FAST_SUPPORT_LP_PLL            (1)     /*!< Support LP_PLL clock as the LP_FAST clock source */
 #define SOC_CLK_LP_FAST_SUPPORT_XTAL_D2           (1)     /*!< Support XTAL_D2 clock as the LP_FAST clock source */
 #define SOC_MODEM_CLOCK_IS_INDEPENDENT            (1)
+#define SOC_MODEM_CLOCK_BLE_RTC_TIMER_WORKAROUND  (1)

 #define SOC_RCC_IS_INDEPENDENT                    1       /*!< Reset and Clock Control is independent, thanks to the PCR registers */

--- a/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
+++ b/components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
@@ -1035,6 +1035,10 @@ config SOC_PM_SUPPORT_PMU_CLK_ICG
    bool
    default y

+config SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG
+    bool
+    default y
+
 config SOC_PM_CPU_RETENTION_BY_SW
    bool
    default y
--- a/components/soc/esp32h4/include/soc/soc_caps.h
+++ b/components/soc/esp32h4/include/soc/soc_caps.h
@@ -199,7 +199,7 @@
 #define SOC_ETM_CHANNELS_PER_GROUP      50  // Number of ETM channels in the group

 /*-------------------------- MODEM CAPS --------------------------------------*/
-#define SOC_MODEM_SUPPORT_ETM           1
+#define SOC_MODEM_SUPPORT_ETM               1

 /*-------------------------- GPIO CAPS ---------------------------------------*/
 // ESP32-H4 has 1 GPIO peripheral
@@ -492,6 +492,7 @@
 // #define MAC_SUPPORT_PMU_MODEM_STATE     SOC_PM_SUPPORT_PMU_MODEM_STATE

 #define SOC_PM_SUPPORT_PMU_CLK_ICG          (1)
+#define SOC_PM_SUPPORT_MODEM_CLOCK_DOMAIN_ICG      (1)

 #define SOC_PM_CPU_RETENTION_BY_SW          (1)
 #define SOC_PM_MODEM_RETENTION_BY_REGDMA    (1)