Merge branch 'fix/c5_cpu_freq_help_leftover' into 'master'

fix(esp_system): remove leftover CPU frequency workaround help on ESP32-C5

See merge request espressif/esp-idf!52170
This commit is contained in:
Michael (XIAO Xufeng)
2026-09-08 18:50:23 +08:00
@@ -21,12 +21,8 @@ choice ESP_DEFAULT_CPU_FREQ_MHZ
depends on !SECURE_FLASH_ENC_ENABLED
bool "240 MHz"
help
When 240MHz is selected, esp_flash_write_encrypted() will automatically limit CPU frequency during
execution:
- v1.2 and above chips: limited to 160MHz
- v1.0 and below chips: limited to 80MHz
When 160MHz or lower is selected, no frequency limiting occurs during encrypted writes. Please refer to
the ESP32-C5 SoC Errata document for more details.
Due to known silicon issue, CPU frequency will be fixed to 160 MHz when flash encryption is enabled. Please
refer to the ESP32-C5 SoC Errata document for more details.
endchoice
config ESP_DEFAULT_CPU_FREQ_MHZ