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fix(esp_hw_support): only bypass pll_160 clock management if PVT is enabled

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This commit is contained in:
wuzhenghui
2026-09-16 18:36:27 +08:00
parent 923bce4161
commit 66482b8109
1 changed files with 8 additions and 6 deletions
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14
components/esp_hw_support/port/esp32s31/esp_clk_tree.c
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@@ -405,6 +405,9 @@ void esp_clk_tree_initialize(void)
#if CONFIG_USJ_ENABLE_USB_SERIAL_JTAG || CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED
/* Bootloader / USJ may keep BBPLL 480M on; declare a permanent hold. */
esp_clk_tree_enable_src(SOC_MOD_CLK_BBPLL, true);
#endif
#if CONFIG_ESP_ENABLE_PVT
esp_clk_tree_enable_src(SOC_MOD_CLK_BBPLL, true);
#endif
/* Flash + CPU: sync clk_tree refs with HW already selected at boot. */
esp_clk_tree_enable_src((soc_module_clk_t)flash_clk_src, true);
@@ -487,7 +490,11 @@ static const esp_clk_tree_gated_clk_t s_gated_ref_clks[] = {
[ESP_CLK_TREE_GATED_CLK_PLL_F20M] = { SOC_MOD_CLK_PLL_F20M, _clk_gate_ll_ref_20m_clk_en, esp_clk_tree_parent_bbpll },
[ESP_CLK_TREE_GATED_CLK_PLL_F60M] = { SOC_MOD_CLK_PLL_F60M, _clk_gate_ll_ref_60m_clk_en, esp_clk_tree_parent_bbpll },
[ESP_CLK_TREE_GATED_CLK_PLL_F120M] = { SOC_MOD_CLK_PLL_F120M, _clk_gate_ll_ref_120m_clk_en, esp_clk_tree_parent_bbpll },
#if CONFIG_ESP_ENABLE_PVT
[ESP_CLK_TREE_GATED_CLK_PLL_F160M] = { SOC_MOD_CLK_PLL_F160M, NULL, esp_clk_tree_parent_bbpll },
#else
[ESP_CLK_TREE_GATED_CLK_PLL_F160M] = { SOC_MOD_CLK_PLL_F160M, _clk_gate_ll_ref_160m_clk_en, esp_clk_tree_parent_bbpll },
#endif
[ESP_CLK_TREE_GATED_CLK_PLL_F240M] = { SOC_MOD_CLK_PLL_F240M, _clk_gate_ll_ref_240m_clk_en, esp_clk_tree_parent_bbpll },
};
@@ -534,12 +541,7 @@ FORCE_INLINE_ATTR esp_err_t esp_clk_tree_enable_gated_clk(const esp_clk_tree_gat
esp_err_t esp_clk_tree_enable_src(soc_module_clk_t clk_src, bool enable)
{
if (clk_src < 1 || clk_src >= SOC_MOD_CLK_INVALID || clk_src == SOC_MOD_CLK_XTAL
#if CONFIG_ESP_ENABLE_PVT
// PLL_F160M must always on if PVT is enabled.
|| clk_src == SOC_MOD_CLK_PLL_F160M
#endif
) {
if (clk_src < 1 || clk_src >= SOC_MOD_CLK_INVALID || clk_src == SOC_MOD_CLK_XTAL) {
/* Not managed by esp_clk_tree*/
return ESP_OK;
}