Merge branch 'refactor/esp_hal_gpio' into 'master'

refactor(gpio): split GPIO HAL into separate component

Closes IDF-14089

See merge request espressif/esp-idf!43215
This commit is contained in:
morris
2025-12-01 10:40:07 +08:00
279 changed files with 972 additions and 692 deletions
@@ -443,14 +443,6 @@ config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
bool
default y
config SOC_GPIO_FILTER_CLK_SUPPORT_APB
bool
default y
config SOC_GPIO_SUPPORT_RTC_INDEPENDENT
bool
default y
config SOC_GPIO_SUPPORT_FORCE_HOLD
bool
default y
@@ -179,10 +179,7 @@
#define SOC_GPIO_PORT 1U
#define SOC_GPIO_PIN_COUNT 49
#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
#define SOC_GPIO_FILTER_CLK_SUPPORT_APB 1
// On ESP32-S3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
// Force hold is a new function of ESP32-S3
#define SOC_GPIO_SUPPORT_FORCE_HOLD (1)
@@ -9,13 +9,5 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
#define _SOC_CAPS_SDM_CHANS_PER_INST 8 // Number of channels in each SDM instance
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */
/*------------------------------- Touch Sensor ------------------------------------*/
#define _SOC_CAPS_TOUCH_CHAN_NUM 15 // Number of touch sensor channels