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Merge branch 'refactor/esp_hal_gpio' into 'master'
refactor(gpio): split GPIO HAL into separate component Closes IDF-14089 See merge request espressif/esp-idf!43215
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@@ -443,14 +443,6 @@ config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
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bool
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default y
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config SOC_GPIO_FILTER_CLK_SUPPORT_APB
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bool
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default y
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config SOC_GPIO_SUPPORT_RTC_INDEPENDENT
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bool
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default y
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config SOC_GPIO_SUPPORT_FORCE_HOLD
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bool
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default y
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@@ -179,10 +179,7 @@
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#define SOC_GPIO_PORT 1U
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#define SOC_GPIO_PIN_COUNT 49
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#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
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#define SOC_GPIO_FILTER_CLK_SUPPORT_APB 1
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// On ESP32-S3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
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#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
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// Force hold is a new function of ESP32-S3
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#define SOC_GPIO_SUPPORT_FORCE_HOLD (1)
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@@ -9,13 +9,5 @@
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#include "soc/soc_caps.h"
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#include "soc/soc_caps_eval.h"
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/*--------------------------- SDM (Sigma-Delta Modulator) ------------------------*/
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#define _SOC_CAPS_SDM_INST_NUM 1 // Number of SDM instances
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#define _SOC_CAPS_SDM_CHANS_PER_INST 8 // Number of channels in each SDM instance
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/*------------------------------- Dedicated GPIO ------------------------------*/
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#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
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#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */
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/*------------------------------- Touch Sensor ------------------------------------*/
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#define _SOC_CAPS_TOUCH_CHAN_NUM 15 // Number of touch sensor channels
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