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Merge branch 'refactor/esp_hal_gpio' into 'master'

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refactor(gpio): split GPIO HAL into separate component

Closes IDF-14089

See merge request espressif/esp-idf!43215
This commit is contained in:
morris
2025-12-01 10:40:07 +08:00
parent 304df32182 06970a5284
commit 580d9bca57
279 changed files with 972 additions and 692 deletions
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components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
-4
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@@ -283,10 +283,6 @@ config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
bool
default y
config SOC_GPIO_FILTER_CLK_SUPPORT_APB
bool
default y
config SOC_GPIO_SUPPORT_FORCE_HOLD
bool
default y
components/soc/esp32c2/include/soc/soc_caps.h
-1
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@@ -124,7 +124,6 @@
#define SOC_GPIO_PORT 1U
#define SOC_GPIO_PIN_COUNT 21
#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
#define SOC_GPIO_FILTER_CLK_SUPPORT_APB 1
// Target has no full RTC IO subsystem, GPIO0~5 remain RTC function (powered by VDD3V3_RTC, and can be used as deep-sleep wakeup pins)
components/soc/esp32c2/include/soc/soc_caps_full.h
-4
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@@ -8,7 +8,3 @@
#include "soc/soc_caps.h"
#include "soc/soc_caps_eval.h"
/*------------------------------- Dedicated GPIO ------------------------------*/
#define _SOC_CAPS_DEDIC_GPIO_OUT_CHANS_PER_CPU 8 /*!< 8 outward channels on each CPU core */
#define _SOC_CAPS_DEDIC_GPIO_IN_CHANS_PER_CPU 8 /*!< 8 inward channels on each CPU core */