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Merge branch 'bugfix/fix_some_wifi_bugs_260706_v5.5' into 'release/v5.5'

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fix(wifi): fix some wifi bugs 260706 v5.5(Backport v5.5)

See merge request espressif/esp-idf!50397
This commit is contained in:
Jiang Jiang Jian
2026-08-18 14:35:26 +08:00
parent 57c627ce6c 1d816e5345
commit 57f61e7933
24 changed files with 18 additions and 57 deletions
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11
components/esp_wifi/include/esp_private/wifi.h
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@@ -868,6 +868,17 @@ typedef esp_err_t (*esp_vendor_ie_cb_with_ret_t)(void *ctx, wifi_vendor_ie_type_
*/
esp_err_t esp_wifi_set_vendor_ie_with_ret_cb(esp_vendor_ie_cb_with_ret_t cb, void *ctx);
/**
* @brief Weak Wi-Fi assert hook.
*
* The Wi-Fi library provides a weak default implementation. Applications may
* define this symbol to override the default behavior for debugging.
*
* @note This is intended for diagnostics only and is not part of normal Wi-Fi
* operation.
*/
void wifi_assert(bool expr, const char *file, const char *func, int line);
#ifdef __cplusplus
}
#endif

2
components/esp_wifi/lib

Submodule components/esp_wifi/lib updated: f0e603f094...3d3b999987

4
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
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@@ -719,10 +719,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

1
components/soc/esp32c2/include/soc/soc_caps.h
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@@ -322,7 +322,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

8
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
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@@ -1027,14 +1027,6 @@ config SOC_COEX_HW_PTI
bool
default y
config SOC_EXTERNAL_COEX_ADVANCE
bool
default n
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

2
components/soc/esp32c3/include/soc/soc_caps.h
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@@ -434,8 +434,6 @@
#define SOC_COEX_HW_PTI (1)
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

4
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
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@@ -1635,10 +1635,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
int
default 12

1
components/soc/esp32c5/include/soc/soc_caps.h
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@@ -626,7 +626,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
// #define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

4
components/soc/esp32c6/include/soc/Kconfig.soc_caps.in
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@@ -1391,10 +1391,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

1
components/soc/esp32c6/include/soc/soc_caps.h
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@@ -539,7 +539,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
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@@ -1127,10 +1127,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

1
components/soc/esp32c61/include/soc/soc_caps.h
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@@ -451,7 +451,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

4
components/soc/esp32h2/include/soc/Kconfig.soc_caps.in
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@@ -1407,10 +1407,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

1
components/soc/esp32h2/include/soc/soc_caps.h
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@@ -564,7 +564,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
// TODO: IDF-6337
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/

4
components/soc/esp32h21/include/soc/Kconfig.soc_caps.in
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@@ -807,10 +807,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

1
components/soc/esp32h21/include/soc/soc_caps.h
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@@ -519,7 +519,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

4
components/soc/esp32h4/include/soc/Kconfig.soc_caps.in
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@@ -467,10 +467,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21

1
components/soc/esp32h4/include/soc/soc_caps.h
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@@ -506,7 +506,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)

4
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
View File

@@ -1187,10 +1187,6 @@ config SOC_COEX_HW_PTI
bool
default y
config SOC_EXTERNAL_COEX_ADVANCE
bool
default n
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default y

1
components/soc/esp32s2/include/soc/soc_caps.h
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@@ -501,7 +501,6 @@
// No contents
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (1) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/

4
components/soc/esp32s3/include/soc/Kconfig.soc_caps.in
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@@ -1447,10 +1447,6 @@ config SOC_COEX_HW_PTI
bool
default y
config SOC_EXTERNAL_COEX_ADVANCE
bool
default n
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default y

1
components/soc/esp32s3/include/soc/soc_caps.h
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@@ -566,7 +566,6 @@
#define SOC_COEX_HW_PTI (1)
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (1) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*-------------------------- SDMMC CAPS -----------------------------------------*/

5
examples/bluetooth/blufi/sdkconfig.ci.nimble
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@@ -1,3 +1,8 @@
CONFIG_BT_ENABLED=y
CONFIG_BT_NIMBLE_ENABLED=y
CONFIG_BT_NIMBLE_BLUFI_ENABLE=y
# Wi-Fi + NimBLE on ESP32 is IRAM-tight after recent wifi lib updates.
# Move Wi-Fi IRAM-optimized paths back to flash to keep the CI build linking.
CONFIG_ESP_WIFI_IRAM_OPT=n
CONFIG_ESP_WIFI_RX_IRAM_OPT=n

2
examples/provisioning/wifi_prov_mgr/partitions.csv
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@@ -2,4 +2,4 @@
# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
nvs, data, nvs, , 0x6000,
phy_init, data, phy, , 0x1000,
factory, app, factory, , 0x15d000,
factory, app, factory, , 0x160000,
1 # Name, Type, SubType, Offset, Size, Flags
2 # Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap
3 nvs, data, nvs, , 0x6000,
4 phy_init, data, phy, , 0x1000,
5 factory, app, factory, , 0x15d000, factory, app, factory, , 0x160000,