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feat(cam): support dvp cam on ESP32-S31

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This commit is contained in:
gaoxu
2026-05-14 17:09:49 +08:00
parent 7ff718a988
commit 4e3751b32e
52 changed files with 1040 additions and 786 deletions
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components/soc/esp32s31/include/soc/Kconfig.soc_caps.in
+8
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@@ -47,6 +47,10 @@ config SOC_LCDCAM_SUPPORTED
bool
default y
config SOC_LCDCAM_CAM_SUPPORTED
bool
default y
config SOC_LCDCAM_I80_LCD_SUPPORTED
bool
default y
@@ -911,6 +915,10 @@ config SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY
bool
default y
config SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV
bool
default y
config SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS
int
default 3
components/soc/esp32s31/include/soc/clk_tree_defs.h
+17
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@@ -179,6 +179,23 @@ typedef enum {
LCD_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default choice */
} soc_periph_lcd_clk_src_t;
//////////////////////////////////////////////////CAM///////////////////////////////////////////////////////////////////
/**
* @brief Array initializer for all supported clock sources of CAM
*/
#define SOC_CAM_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL, SOC_MOD_CLK_APLL}
/**
* @brief Type of CAM clock source
*/
typedef enum {
CAM_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */
CAM_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
CAM_CLK_SRC_APLL = SOC_MOD_CLK_APLL, /*!< Select APLL as the source clock */
CAM_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default choice */
} soc_periph_cam_clk_src_t;
//////////////////////////////////////////////////SYSTIMER//////////////////////////////////////////////////////////////
/**
components/soc/esp32s31/include/soc/soc_caps.h
+5 -1
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@@ -35,7 +35,7 @@
#define SOC_DMA2D_SUPPORTED 1
#define SOC_GPTIMER_SUPPORTED 1
#define SOC_LCDCAM_SUPPORTED 1
// #define SOC_LCDCAM_CAM_SUPPORTED 1 // TODO: [ESP32S31] IDF-14722
#define SOC_LCDCAM_CAM_SUPPORTED 1
#define SOC_LCDCAM_I80_LCD_SUPPORTED 1
#define SOC_LCDCAM_RGB_LCD_SUPPORTED 1
#define SOC_LCD_I80_SUPPORTED 1
@@ -365,6 +365,10 @@
// TODO: [ESP32S31] IDF-14626
#define SOC_KEY_MANAGER_ECDSA_KEY_DEPLOY 1 /*!< Key manager responsible to deploy ECDSA key */
// #define SOC_KEY_MANAGER_FE_KEY_DEPLOY 1 /*!< Key manager responsible to deploy Flash Encryption key */
/*--------------------------- CAM ---------------------------------*/
#define SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV (1)
/*-------------------------- Secure Boot CAPS----------------------------*/
// TODO: [ESP32S31] IDF-14629
#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3