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feat(esp32p4): add H264 REGDMA link and sleep retention module

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This commit is contained in:
houhaiyan
2026-04-01 15:56:13 +08:00
parent c8cf7e34c1
commit 4e1b7298c5
5 changed files with 15 additions and 0 deletions
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4
components/esp_hw_support/sleep_system_peripheral.c
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@@ -298,6 +298,10 @@ bool peripheral_domain_pd_allowed(void)
mask.bitmap[SLEEP_RETENTION_MODULE_LCDCAM >> 5] |= BIT(SLEEP_RETENTION_MODULE_LCDCAM % 32);
#endif
#if SOC_H264_ENCODER_SUPPORTED
mask.bitmap[SLEEP_RETENTION_MODULE_H264 >> 5] |= BIT(SLEEP_RETENTION_MODULE_H264 % 32);
#endif
#if SOC_DMA2D_SUPPORTED
mask.bitmap[SLEEP_RETENTION_MODULE_DMA2D >> 5] |= BIT(SLEEP_RETENTION_MODULE_DMA2D % 32);
#endif

4
components/soc/esp32p4/include/soc/Kconfig.soc_caps.in
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@@ -2283,6 +2283,10 @@ config SOC_JPEG_ENCODE_SUPPORTED
bool
default y
config SOC_H264_ENCODER_SUPPORTED
bool
default y
config SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV
bool
default y

2
components/soc/esp32p4/include/soc/retention_periph_defs.h
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@@ -61,6 +61,7 @@ typedef enum periph_retention_module {
SLEEP_RETENTION_MODULE_MCPWM1 = 35,
SLEEP_RETENTION_MODULE_PCNT0 = 36,
SLEEP_RETENTION_MODULE_LCDCAM = 39,
SLEEP_RETENTION_MODULE_H264 = 40,
SLEEP_RETENTION_MODULE_DMA2D = 41,
SLEEP_RETENTION_MODULE_PPA = 42,
@@ -106,6 +107,7 @@ typedef enum periph_retention_module {
: ((m) == SLEEP_RETENTION_MODULE_MCPWM1) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PCNT0) ? true \
: ((m) == SLEEP_RETENTION_MODULE_LCDCAM) ? true \
: ((m) == SLEEP_RETENTION_MODULE_H264) ? true \
: ((m) == SLEEP_RETENTION_MODULE_DMA2D) ? true \
: ((m) == SLEEP_RETENTION_MODULE_PPA) ? true \
: false)

3
components/soc/esp32p4/include/soc/soc_caps.h
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@@ -843,6 +843,9 @@
#define SOC_JPEG_DECODE_SUPPORTED (1)
#define SOC_JPEG_ENCODE_SUPPORTED (1)
/*--------------------------- H264 --------------------------------*/
#define SOC_H264_ENCODER_SUPPORTED (1)
/*--------------------------- CAM ---------------------------------*/
#define SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV (1)
#define SOC_LCDCAM_CAM_PERIPH_NUM (1U)

2
components/soc/include/soc/regdma.h
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@@ -65,6 +65,7 @@ extern "C" {
#define REGDMA_PCNT_LINK(_pri) ((0x25 << 8) | _pri)
#define REGDMA_MCPWM_LINK(_pri) ((0x26 << 8) | _pri)
#define REGDMA_LCDCAM_LINK(_pri) ((0x29 << 8) | _pri)
#define REGDMA_H264_LINK(_pri) ((0x2a << 8) | _pri)
#define REGDMA_PPA_LINK(_pri) ((0x2B << 8) | _pri)
#define REGDMA_DMA2D_LINK(_pri) ((0x2C << 8) | _pri)
@@ -95,6 +96,7 @@ extern "C" {
#define REGDMA_LINK_PRI_LEDC REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_MCPWM REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_LCDCAM REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_H264 REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_PPA REGDMA_LINK_PRI_GENERAL_PERIPH
#define REGDMA_LINK_PRI_DMA2D REGDMA_LINK_PRI_GENERAL_PERIPH