fix(driver_spi): ci enable h4 generic test

components/esp_driver_spi/test_apps/master/main/test_spi_master.c

@@ -2135,7 +2135,7 @@ TEST_CASE("SPI_Master: PSRAM buffer transaction via EDMA", "[spi]")
 
     spi_device_handle_t dev_handle = NULL;
     spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
-    devcfg.clock_speed_hz = 80 * 1000 * 1000;   // Test error case on highest freq first
+    devcfg.clock_speed_hz = IDF_TARGET_MAX_SPI_CLK_FREQ;   // Test error case on highest freq first
     TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, &dev_handle));
     int real_freq_khz;
     spi_device_get_actual_freq(dev_handle, &real_freq_khz);
@@ -2164,9 +2164,6 @@ TEST_CASE("SPI_Master: PSRAM buffer transaction via EDMA", "[spi]")
         TEST_ASSERT(i ? (before - after) < 2 * TEST_EDMA_TRANS_LEN : (before - after) > 2 * TEST_EDMA_TRANS_LEN);
         spi_device_polling_end(dev_handle, portMAX_DELAY);
         printf("TX fail: %d, RX fail: %d\n", !!(trans_cfg.flags & SPI_TRANS_DMA_TX_FAIL), !!(trans_cfg.flags & SPI_TRANS_DMA_RX_FAIL));
-#if !SOC_IS(ESP32P4)  // P4 can't reach error condition since it has powerful 16bits ddr psram
-        TEST_ASSERT((!!i) == !!(trans_cfg.flags & (SPI_TRANS_DMA_TX_FAIL | SPI_TRANS_DMA_RX_FAIL)));
-#endif
         if (!i) { // data should be correct if using auto malloc
             TEST_ASSERT_EQUAL_HEX8_ARRAY(trans_cfg.tx_buffer, trans_cfg.rx_buffer, TEST_EDMA_TRANS_LEN);
         }

components/esp_driver_spi/test_apps/master/pytest_spi_master.py

@@ -17,7 +17,6 @@ from pytest_embedded_idf.utils import soc_filtered_targets
 @idf_parametrize(
     'target', soc_filtered_targets('SOC_GPSPI_SUPPORTED == 1 and IDF_TARGET not in ["esp32c5"]'), indirect=['target']
 )
-@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='cannot pass')  # TODO: IDF-15615
 def test_master_single_dev(case_tester) -> None:  # type: ignore
     for case in case_tester.test_menu:
         if 'test_env' in case.attributes:

components/esp_driver_spi/test_apps/param/pytest_spi_param.py

@@ -6,7 +6,6 @@ from pytest_embedded_idf.utils import idf_parametrize
 
 @pytest.mark.generic
 @idf_parametrize('target', ['supported_targets'], indirect=['target'])
-@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='cannot pass')  # TODO: IDF-15615
 def test_param_single_dev(case_tester) -> None:  # type: ignore
     case_tester.run_all_normal_cases(reset=True)
 

components/esp_driver_spi/test_apps/slave/main/test_spi_slave.c

@@ -324,14 +324,6 @@ TEST_CASE("test slave using external ram", "[spi]")
         ESP_LOGI(SLAVE_TAG, "ok\n");
     }
 
-#if (TEST_SPI_PERIPH_NUM >= 2) && !SOC_IS(ESP32P4)  // P4 can't reach error condition since it has powerful 16bits ddr psram
-    master_tans.override_freq_hz = 61000000;    // real freq will be 40 if just config 60M
-    ESP_LOGI(SLAVE_TAG, "Testing over freq: %ld", master_tans.override_freq_hz);
-    TEST_ESP_OK(spi_slave_queue_trans(TEST_SPI_HOST, &slave_tans, portMAX_DELAY));
-    spi_device_transmit(spi, (spi_transaction_t *)&master_tans);
-    TEST_ESP_ERR(ESP_ERR_INVALID_STATE, spi_slave_get_trans_result(TEST_SPI_HOST, &out_trans, portMAX_DELAY));
-#endif
-
     free(slave_ext_tx);
     free(slave_ext_rx);
     free(master_tx);

components/esp_driver_spi/test_apps/slave/pytest_spi_slave.py

@@ -12,7 +12,6 @@ from pytest_embedded_idf.utils import soc_filtered_targets
     soc_filtered_targets('SOC_GPSPI_SUPPORTED == 1 and IDF_TARGET not in ["esp32c5"]'),
     indirect=['target'],
 )
-@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='cannot pass')  # TODO: IDF-15615
 def test_slave_single_dev(case_tester) -> None:  # type: ignore
     case_tester.run_all_normal_cases(reset=True)
 

components/esp_driver_spi/test_apps/slave_hd/pytest_spi_slave_hd.py

@@ -13,7 +13,6 @@ from pytest_embedded_idf.utils import soc_filtered_targets
     soc_filtered_targets('SOC_SPI_SUPPORT_SLAVE_HD_VER2 == 1 and IDF_TARGET not in ["esp32c5"]'),
     indirect=['target'],
 )
-@pytest.mark.temp_skip_ci(targets=['esp32h4'], reason='cannot pass')  # TODO: IDF-15615
 def test_slave_hd_single_dev(case_tester) -> None:  # type: ignore
     case_tester.run_all_normal_cases(reset=True, timeout=180)
 

components/soc/esp32h4/include/soc/Kconfig.soc_caps.in

@@ -851,6 +851,10 @@ config SOC_SPI_SUPPORT_SLAVE_HD_VER2
     bool
     default y
 
+config SOC_SPI_SUPPORT_SLEEP_RETENTION
+    bool
+    default y
+
 config SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
     bool
     default y

components/soc/esp32h4/include/soc/soc_caps.h

@@ -368,6 +368,7 @@
 #define SOC_SPI_PERIPH_NUM                  3
 #define SOC_SPI_MAXIMUM_BUFFER_SIZE         64
 #define SOC_SPI_SUPPORT_SLAVE_HD_VER2       1
+#define SOC_SPI_SUPPORT_SLEEP_RETENTION     1
 
 /*-------------------------- SPI MEM CAPS ---------------------------------------*/
 #define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE                (1)