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Merge branch 'refactor/flash_refactor' into 'master'
spi_flash: split driver and os driver into `spi_flash` and `esp_mspi` components Closes IDF-15210 See merge request espressif/esp-idf!45409
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@@ -12,7 +12,7 @@ if(${target} STREQUAL "linux")
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"freertos_hooks.c"
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"startup.c"
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INCLUDE_DIRS "include"
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PRIV_REQUIRES spi_flash)
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PRIV_REQUIRES esp_mspi)
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# Add custom ld file (used to place system init functions).
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# Mach-O (Apple) does not support linker scripts; section bounds are resolved
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@@ -39,10 +39,10 @@ if(BOOTLOADER_BUILD OR esp_tee_build)
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if(esp_tee_build)
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list(APPEND include_dirs "port/include/private")
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endif()
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# "_esp_error_check_failed()" requires spi_flash module
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# "_esp_error_check_failed()" requires esp_mspi module
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# Bootloader relies on some Kconfig options defined in esp_system.
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idf_component_register(SRCS "${srcs}" INCLUDE_DIRS "${include_dirs}"
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REQUIRES spi_flash)
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PRIV_REQUIRES esp_mspi)
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else()
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list(APPEND srcs "crosscore_int.c"
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"esp_ipc.c"
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@@ -96,7 +96,7 @@ else()
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list(APPEND srcs "debug_assist.c")
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endif()
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set(priv_requires spi_flash esp_timer esp_mm
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set(priv_requires esp_mspi esp_timer esp_mm
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esp_hal_clock esp_hal_mspi esp_hal_wdt esp_hal_debug_assist
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esp_hal_uart esp_hal_dma esp_hal_security
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# [refactor-todo] requirements due to init code,
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@@ -121,7 +121,6 @@
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#include "esp_rom_spiflash.h"
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#include "bootloader_init.h"
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#include "esp_private/bootloader_flash_internal.h"
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#include "spi_flash_mmap.h"
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#endif // CONFIG_APP_BUILD_TYPE_RAM
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//This dependency will be removed in the future
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@@ -569,7 +568,7 @@ FORCE_INLINE_ATTR IRAM_ATTR void ext_mem_init(void)
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uint32_t cache_mmu_irom_size = 0;
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#if !CONFIG_APP_BUILD_TYPE_ELF_RAM
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uint32_t _instruction_size = (uint32_t)&_instruction_reserved_end - (uint32_t)&_instruction_reserved_start;
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cache_mmu_irom_size = ((_instruction_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE) * sizeof(uint32_t);
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cache_mmu_irom_size = ((_instruction_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE) * sizeof(uint32_t);
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#endif // !CONFIG_APP_BUILD_TYPE_ELF_RAM
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/* Configure the Cache MMU size for instruction and rodata in flash. */
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Cache_Set_IDROM_MMU_Size(cache_mmu_irom_size, CACHE_DROM_MMU_MAX_END - cache_mmu_irom_size);
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@@ -780,10 +779,10 @@ NOINLINE_ATTR static void system_early_init(const soc_reset_reason_t *rst_reas)
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uint32_t cache_mmu_drom_size = 0;
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#if !CONFIG_APP_BUILD_TYPE_ELF_RAM
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uint32_t _instruction_size = (uint32_t)&_instruction_reserved_end - (uint32_t)&_instruction_reserved_start;
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cache_mmu_irom_size = ((_instruction_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE) * sizeof(uint32_t);
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cache_mmu_irom_size = ((_instruction_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE) * sizeof(uint32_t);
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uint32_t _rodata_size = (uint32_t)&_rodata_reserved_end - (uint32_t)&_rodata_reserved_start;
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cache_mmu_drom_size = ((_rodata_size + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE) * sizeof(uint32_t);
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cache_mmu_drom_size = ((_rodata_size + CONFIG_MMU_PAGE_SIZE - 1) / CONFIG_MMU_PAGE_SIZE) * sizeof(uint32_t);
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#endif // !CONFIG_APP_BUILD_TYPE_ELF_RAM
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int s_instr_flash2spiram_off = 0;
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@@ -69,7 +69,13 @@ CORE: 118: init_vfs_nullfs in components/vfs/nullfs.c on BIT(0)
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CORE: 119: init_vfs_console in components/esp_stdio/stdio_vfs.c on BIT(0)
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CORE: 120: init_libc_stdio in components/esp_libc/src/init.c on BIT(0)
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CORE: 125: init_flash_dpd in components/esp_mspi/flash_ops.c on BIT(0)
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CORE: 130: init_flash in components/spi_flash/esp_flash_spi_init.c on BIT(0)
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# Register partition-based flash write protection callback into spi_flash, right after init_flash.
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CORE: 131: esp_partition_flash_region_protection_init in components/esp_partition/partition_target.c on BIT(0)
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CORE: 140: init_efuse in components/efuse/src/esp_efuse_startup.c on BIT(0)
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CORE: 170: init_xt_wdt in components/esp_system/startup_funcs.c on BIT(0)
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@@ -142,7 +148,7 @@ SECONDARY: 230: usb_serial_jtag_conn_status_init in components/esp_driver_usb_se
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# psram adjust timing point need a separate task which should be created at startup.
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# Valid only `CONFIG_SPIRAM_TIMING_TUNING_POINT_VIA_TEMPERATURE_SENSOR` is enabled.
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SECONDARY: 240: psram_adjust_timing_point_via_temperature in components/esp_hw_support/mspi/mspi_timing_tuning/port/esp32s3/mspi_timing_by_mspi_delay.c on BIT(0)
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SECONDARY: 240: psram_adjust_timing_point_via_temperature in components/esp_mspi/mspi_timing_tuning/port/esp32s3/mspi_timing_by_mspi_delay.c on BIT(0)
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# Has to be the last step!
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# Now that the application is about to start, disable boot watchdog
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@@ -2,5 +2,5 @@ set(srcs "test_cache_disabled.c"
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"test_app_main.c")
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idf_component_register(SRCS ${srcs}
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PRIV_REQUIRES unity spi_flash
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PRIV_REQUIRES unity esp_mspi
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WHOLE_ARCHIVE)
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