feat(esp_tee): Use CTR-DRBG for assisting random number generation in TEE

- For ESP-TEE, fault-assert in `esp_random()` if the RNG is held in a
  freeze state
This commit is contained in:
Laukik Hase
2026-07-06 17:27:27 +05:30
parent 52a6ad71ee
commit 4812dbd2d8
5 changed files with 110 additions and 7 deletions

View File

@@ -18,6 +18,8 @@
#if !ESP_TEE_BUILD
#include "esp_private/startup_internal.h"
#else
#include "esp_fault.h"
#endif
#include "hal/rtc_timer_hal.h"
@@ -80,6 +82,9 @@ uint32_t IRAM_ATTR esp_random(void)
uint32_t result = 0;
for (size_t i = 0; i < sizeof(result); i++) {
do {
#if ESP_TEE_BUILD
ESP_FAULT_ASSERT(rng_ll_is_enabled());
#endif
ccount = esp_cpu_get_cycle_count();
result ^= rng_ll_read_data();
} while (ccount - last_ccount < cpu_to_apb_freq_ratio * APB_CYCLE_WAIT_NUM);

View File

@@ -12,7 +12,6 @@
#include "esp_fault.h"
#include "esp_efuse.h"
#include "esp_efuse_chip.h"
#include "esp_random.h"
#include "spi_flash_mmap.h"
#if SOC_HMAC_SUPPORTED
#include "psa_crypto_driver_esp_hmac_opaque.h"
@@ -314,6 +313,13 @@ bool esp_tee_sec_storage_is_key_tee_owned(const char *key_id)
esp_err_t esp_tee_sec_storage_init(void)
{
/* Explicitly seeds the CTR-DRBG before any PSA operations */
uint8_t random;
psa_status_t ret = psa_generate_random(&random, sizeof(random));
if (ret != PSA_SUCCESS) {
return ESP_FAIL;
}
nvs_sec_cfg_t cfg = {};
esp_err_t err = read_security_cfg_hmac(&cfg);
if (err != ESP_OK) {
@@ -479,9 +485,9 @@ static int generate_aes256_key(sec_stg_key_t *keyctx)
}
ESP_LOGD(TAG, "Generating AES-256 key...");
esp_fill_random(&keyctx->aes256.key, AES256_KEY_LEN);
psa_status_t status = psa_generate_random(keyctx->aes256.key, AES256_KEY_LEN);
return 0;
return (status == PSA_SUCCESS) ? 0 : -1;
}
esp_err_t esp_tee_sec_storage_gen_key(const esp_tee_sec_storage_key_cfg_t *cfg)
@@ -747,7 +753,11 @@ static esp_err_t tee_sec_storage_crypt_common(const char *key_id, const uint8_t
}
if (is_encrypt) {
esp_fill_random(iv, iv_len);
status = psa_generate_random(iv, iv_len);
if (status != PSA_SUCCESS) {
err = ESP_FAIL;
goto cleanup;
}
size_t output_length = 0;
status = psa_aead_encrypt(psa_key_id, PSA_ALG_AEAD_WITH_SHORTENED_TAG(PSA_ALG_GCM, tag_len),

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@@ -27,6 +27,9 @@
#if SOC_ECDSA_SUPPORTED
#include "hal/ecdsa_ll.h"
#endif
#if SOC_RNG_SUPPORTED
#include "hal/rng_ll.h"
#endif
#include "esp_tee.h"
#include "esp_attr.h"
@@ -77,4 +80,11 @@ void IRAM_ATTR esp_tee_soc_reset_crypto_peripherals(void)
ecdsa_ll_reset_register();
ecdsa_ll_enable_bus_clock(false);
#endif
#if SOC_RNG_SUPPORTED
rng_ll_enable();
#if RNG_LL_NEEDS_RESET_WHEN_WAKEUP
rng_ll_reset();
#endif
#endif
}

View File

@@ -43,6 +43,12 @@
#if SOC_AES_SUPPORTED
#define ESP_AES_DRIVER_ENABLED
#define MBEDTLS_PSA_ACCEL_KEY_TYPE_AES
#define MBEDTLS_PSA_ACCEL_ALG_ECB_NO_PADDING
#define MBEDTLS_PSA_ACCEL_ALG_CBC_NO_PADDING
#define MBEDTLS_PSA_ACCEL_ALG_CBC_PKCS7
#define MBEDTLS_PSA_ACCEL_ALG_CFB
#define MBEDTLS_PSA_ACCEL_ALG_CTR
#define MBEDTLS_PSA_ACCEL_ALG_OFB
#endif
#define MBEDTLS_CIPHER_MODE_XTS
@@ -119,11 +125,14 @@
/* Disable unused cipher/algorithm types */
#undef PSA_WANT_KEY_TYPE_ARIA
#undef PSA_WANT_KEY_TYPE_CAMELLIA
#undef PSA_WANT_KEY_TYPE_CHACHA20
#undef PSA_WANT_KEY_TYPE_DES
#undef PSA_WANT_ALG_RIPEMD160
#undef PSA_WANT_ALG_STREAM_CIPHER
#undef PSA_WANT_ALG_CHACHA20
#undef PSA_WANT_ALG_CHACHA20_POLY1305
#undef PSA_WANT_ALG_CCM
#undef PSA_WANT_ALG_CCM_STAR_NO_TAG
#undef PSA_WANT_ALG_CMAC
#define MBEDTLS_AES_ROM_TABLES
@@ -165,6 +174,8 @@
#undef MBEDTLS_SSL_SRV_C
#undef PSA_WANT_ALG_TLS12_PRF
#undef PSA_WANT_ALG_TLS12_PSK_TO_MS
#undef PSA_WANT_ALG_TLS12_ECJPAKE_TO_PMS
#undef PSA_WANT_ALG_PBKDF2_HMAC
#undef PSA_WANT_ALG_PBKDF2_AES_CMAC_PRF_128
@@ -191,8 +202,8 @@
/* Disable self-test functions to save code size */
#undef MBEDTLS_SELF_TEST
/* TEE uses EXTERNAL_RNG, no need for CTR-DRBG */
#undef MBEDTLS_CTR_DRBG_C
/* CTR-DRBG for strengthening the RNG operations in TEE */
#define MBEDTLS_CTR_DRBG_C
/* Disable PEM/Base64 — TEE uses DER format */
#undef MBEDTLS_PEM_PARSE_C

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -11,6 +11,62 @@
#include <entropy_poll.h>
#include "psa/crypto.h"
#if ESP_TEE_BUILD
#include "mbedtls/private/ctr_drbg.h"
#include "mbedtls/platform_util.h"
#include "esp_cpu.h"
#include "esp_fault.h"
#include "hal/efuse_hal.h"
#include "hal/rng_ll.h"
#define CTR_DRBG_RESEED_INTERVAL 1024
static mbedtls_ctr_drbg_context s_ctr_drbg;
static int esp_tee_entropy_func(void *data, unsigned char *output, unsigned int len)
{
(void)data;
/* Explicitly enable the RNG */
rng_ll_enable();
esp_fill_random(output, len);
return 0;
}
static void esp_tee_ctr_drbg_init(void)
{
static bool s_ctr_drbg_initialized = false;
if (!s_ctr_drbg_initialized) {
/* Personalization data for CTR-DRBG seeding */
struct {
uint8_t mac[6];
uint32_t random;
uint32_t cycle_cnt;
} data = {};
rng_ll_enable();
data.random = esp_random();
efuse_hal_get_mac(data.mac);
data.cycle_cnt = esp_cpu_get_cycle_count();
mbedtls_ctr_drbg_init(&s_ctr_drbg);
mbedtls_ctr_drbg_set_reseed_interval(&s_ctr_drbg, CTR_DRBG_RESEED_INTERVAL);
int ret = mbedtls_ctr_drbg_seed(&s_ctr_drbg, esp_tee_entropy_func, NULL,
(const unsigned char *)&data, sizeof(data));
mbedtls_platform_zeroize(&data, sizeof(data));
if (ret != 0) {
abort();
}
ESP_FAULT_ASSERT(ret == 0);
s_ctr_drbg_initialized = true;
}
ESP_FAULT_ASSERT(s_ctr_drbg_initialized);
}
#endif // ESP_TEE_BUILD
int mbedtls_hardware_poll( void *data,
unsigned char *output, size_t len, size_t *olen )
{
@@ -27,7 +83,18 @@ psa_status_t mbedtls_psa_external_get_random(
if (context == NULL || output == NULL || output_length == NULL) {
return PSA_ERROR_INVALID_ARGUMENT;
}
#if ESP_TEE_BUILD
esp_tee_ctr_drbg_init();
int ret = mbedtls_ctr_drbg_random(&s_ctr_drbg, output, output_size);
if (ret != 0) {
return PSA_ERROR_HARDWARE_FAILURE;
}
ESP_FAULT_ASSERT(ret == 0);
#else
esp_fill_random(output, output_size);
#endif
*output_length = output_size;
return PSA_SUCCESS;
}