Merge branch 'bugfix/fix_some_wifi_bugs_260706_v5.3' into 'release/v5.3'

fix(wifi): fix some wifi bugs 260706 v5.3(Backport v5.3)

See merge request espressif/esp-idf!50418
This commit is contained in:
Jiang Jiang Jian
2026-07-07 10:27:53 +08:00
16 changed files with 13 additions and 42 deletions
+12 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -815,6 +815,17 @@ esp_err_t esp_wifi_disconnect_internal(void);
*/
void esp_wifi_enable_easy_fragment(bool enable);
/**
* @brief Weak Wi-Fi assert hook.
*
* The Wi-Fi library provides a weak default implementation. Applications may
* define this symbol to override the default behavior for debugging.
*
* @note This is intended for diagnostics only and is not part of normal Wi-Fi
* operation.
*/
void wifi_assert(bool expr, const char *file, const char *func, int line);
#ifdef __cplusplus
}
#endif
@@ -727,10 +727,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@@ -326,7 +326,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
@@ -1015,14 +1015,6 @@ config SOC_COEX_HW_PTI
bool
default y
config SOC_EXTERNAL_COEX_ADVANCE
bool
default n
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@@ -431,8 +431,6 @@
#define SOC_COEX_HW_PTI (1)
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
@@ -1307,10 +1307,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@@ -514,7 +514,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
@@ -891,10 +891,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@@ -494,7 +494,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
#define SOC_PHY_DIG_REGS_MEM_SIZE (21*4)
@@ -1319,10 +1319,6 @@ config SOC_EXTERNAL_COEX_ADVANCE
bool
default y
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default n
config SOC_PHY_DIG_REGS_MEM_SIZE
int
default 21
@@ -539,7 +539,6 @@
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (1) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (0) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
// TODO: IDF-6337
/*--------------- PHY REGISTER AND MEMORY SIZE CAPS --------------------------*/
@@ -1163,10 +1163,6 @@ config SOC_COEX_HW_PTI
bool
default y
config SOC_EXTERNAL_COEX_ADVANCE
bool
default n
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default y
@@ -496,7 +496,6 @@
// No contents
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (1) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
@@ -1403,10 +1403,6 @@ config SOC_COEX_HW_PTI
bool
default y
config SOC_EXTERNAL_COEX_ADVANCE
bool
default n
config SOC_EXTERNAL_COEX_LEADER_TX_LINE
bool
default y
@@ -550,7 +550,6 @@
#define SOC_COEX_HW_PTI (1)
/*-------------------------- EXTERNAL COEXISTENCE CAPS -------------------------------------*/
#define SOC_EXTERNAL_COEX_ADVANCE (0) /*!< HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS */
#define SOC_EXTERNAL_COEX_LEADER_TX_LINE (1) /*!< EXTERNAL COEXISTENCE TX LINE CAPS */
/*-------------------------- SDMMC CAPS -----------------------------------------*/