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Merge branch 'bugfix/gpspi_flash_freq_calc_v6.0' into 'release/v6.0'

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fix(spi_flash): gpspi flash clock could reach higher frequency (v6.0)

See merge request espressif/esp-idf!49441
This commit is contained in:
morris
2026-06-29 10:18:04 +08:00
parent 383369eeb3 a242565623
commit 3576e8a4d4
13 changed files with 14 additions and 22 deletions
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1
components/esp_hal_mspi/esp32c2/include/hal/gpspi_flash_ll.h
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@@ -29,7 +29,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (40)
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32c3/include/hal/gpspi_flash_ll.h
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@@ -30,7 +30,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32c5/include/hal/gpspi_flash_ll.h
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@@ -32,7 +32,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
#define GPSPI_FLASH_LL_SUPPORT_CLK_SRC_PRE_DIV (1)
#define GPSPI_FLASH_LL_PERIPH_CLK_DIV_MAX ((SPI_CLKCNT_N + 1) * (SPI_CLKDIV_PRE + 1)) //peripheral internal maxmum clock divider

1
components/esp_hal_mspi/esp32c6/include/hal/gpspi_flash_ll.h
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@@ -31,7 +31,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32c61/include/hal/gpspi_flash_ll.h
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@@ -31,7 +31,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32h2/include/hal/gpspi_flash_ll.h
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@@ -31,7 +31,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32h4/include/hal/gpspi_flash_ll.h
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@@ -33,7 +33,6 @@ extern "C" {
#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32p4/include/hal/gpspi_flash_ll.h
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@@ -38,7 +38,6 @@ extern "C" {
)) )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80)
#define GPSPI_FLASH_LL_SUPPORT_CLK_SRC_PRE_DIV (1)
#define GPSPI_FLASH_LL_PERIPH_CLK_DIV_MAX ((SPI_CLKCNT_N + 1) * (SPI_CLKDIV_PRE + 1)) //peripheral internal maxmum clock divider

1
components/esp_hal_mspi/esp32s2/include/hal/gpspi_flash_ll.h
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@@ -36,7 +36,6 @@ extern "C" {
)) )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ 80
/*------------------------------------------------------------------------------
* Control

1
components/esp_hal_mspi/esp32s3/include/hal/gpspi_flash_ll.h
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@@ -36,7 +36,6 @@ extern "C" {
)) )
typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t;
#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ 80
/*------------------------------------------------------------------------------
* Control

2
components/soc/esp32h4/include/soc/clk_tree_defs.h
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@@ -251,7 +251,7 @@ typedef enum {
* @brief Type of SPI clock source.
*/
typedef enum {
SPI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M, /*!< Select XTAL as SPI source clock */
SPI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M, /*!< Select PLL_F48M as SPI source clock */
SPI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as SPI source clock */
SPI_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M, /*!< Select PLL_48M as SPI source clock */
SPI_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as SPI source clock */

16
components/spi_flash/esp_flash_spi_init.c
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@@ -56,6 +56,8 @@ __attribute__((unused)) static const char TAG[] = "spi_flash";
esp_flash_t *esp_flash_default_chip = NULL;
#endif
#define ESP_FLASH_GPSPI_PERIPH_SRC_FREQ_MAX (80*1000*1000) //peripheral hardware limitation for clock source into peripheral
#if defined CONFIG_ESPTOOLPY_FLASHFREQ_120M
#define DEFAULT_FLASH_SPEED 120
#elif defined CONFIG_ESPTOOLPY_FLASHFREQ_80M
@@ -262,13 +264,13 @@ static esp_err_t acquire_spi_device(const esp_flash_spi_device_config_t *config,
#if GPSPI_FLASH_LL_SUPPORT_CLK_SRC_PRE_DIV
static uint32_t s_spi_find_clock_src_pre_div(uint32_t src_freq, uint32_t target_freq)
{
// pre division must be even and at least 2
uint32_t min_div = ((src_freq / GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ) + 1) & (~0x01UL);
min_div = min_div < 2 ? 2 : min_div;
// no timing tuning, no need pre division to be even
uint32_t min_div = (src_freq / ESP_FLASH_GPSPI_PERIPH_SRC_FREQ_MAX);
min_div = min_div < 1 ? 1 : min_div;
uint32_t total_div = src_freq / target_freq;
// Loop the `div` to find a divisible value of `total_div`
for (uint32_t pre_div = min_div; pre_div <= total_div; pre_div += 2) {
for (uint32_t pre_div = min_div; pre_div <= total_div; pre_div += 1) {
if ((total_div % pre_div) || (total_div / pre_div) > GPSPI_FLASH_LL_PERIPH_CLK_DIV_MAX) {
continue;
}
@@ -306,9 +308,9 @@ static uint32_t init_gpspi_clock(esp_flash_t *chip, const esp_flash_spi_device_c
// Calculate final clock source frequency
uint32_t final_freq_mhz;
#if GPSPI_FLASH_LL_SUPPORT_CLK_SRC_PRE_DIV
uint32_t pre_div = s_spi_find_clock_src_pre_div(clk_src_freq, GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ * 1000 * 1000);
gpspi_flash_ll_clk_source_pre_div(spi_flash_ll_get_hw(config->host_id), pre_div / 2, 2);
final_freq_mhz = clk_src_freq / (pre_div);
uint32_t pre_div = s_spi_find_clock_src_pre_div(clk_src_freq, config->freq_mhz * 1000 * 1000);
gpspi_flash_ll_clk_source_pre_div(spi_flash_ll_get_hw(config->host_id), pre_div, 1);
final_freq_mhz = clk_src_freq / (1000 * 1000) / pre_div;
#else
final_freq_mhz = clk_src_freq / (1 * 1000 * 1000);
#endif

8
components/spi_flash/test_apps/esp_flash/main/test_esp_flash_drv.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
@@ -597,11 +597,11 @@ TEST_CASE_MULTI_FLASH_IGNORE("Test esp_flash_write can toggle QE bit", test_togg
// This table could be chip specific in the future.
#if CONFIG_IDF_TARGET_ESP32C2
uint8_t flash_frequency_table[4] = {5, 10, 20, 40};
uint8_t flash_frequency_table[] = {5, 10, 20, 40};
#elif CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32H21 || CONFIG_IDF_TARGET_ESP32H4
uint8_t flash_frequency_table[4] = {6, 12, 24, 48};
uint8_t flash_frequency_table[] = {8, 16, 24, 48};
#else
uint8_t flash_frequency_table[6] = {5, 10, 20, 26, 40, 80};
uint8_t flash_frequency_table[] = {5, 10, 20, 26, 40, 80};
#endif
#define TEST_FLASH_SPEED_MIN 5
void test_permutations_part(const flashtest_config_t* config, esp_partition_t* part, void* source_buf, size_t length)