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refactor(bt/ble_log): share SPI master pin config with IOMUX fallback

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Move the SPI2 bus, transfer-size and DMA-alignment constants shared by the
full-duplex DMA and half-duplex HD transports into
ble_log_prph_spi_common.h. Pin numbers stay Kconfig-driven but fall back to
the target's native SPI2 IOMUX pins when configured negative, and default to
-1 so both transports use the native pins out of the box; any GPIO number
still overrides.
This commit is contained in:
Zhou Xiao
2026-08-13 00:14:13 +08:00
parent 1831a49a26
commit 30f93c0bc5
4 changed files with 54 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/bt/common/ble_log/Kconfig.in
+12 -9
View File
@@ -219,22 +219,25 @@ if BLE_LOG_ENABLED
if BLE_LOG_PRPH_SPI_MASTER_DMA || BLE_LOG_PRPH_SPI_MASTER_HD
config BLE_LOG_PRPH_SPI_MASTER_DMA_MOSI_IO_NUM
int "GPIO number of MOSI port for SPI master transport"
default 0
int "GPIO number of MOSI port for SPI master transport (-1: native SPI2 IOMUX)"
default -1
help
GPIO number of MOSI port for SPI master transport
GPIO number of MOSI port for SPI master transport. Set to -1
to use the target's native SPI2 IOMUX pin.
config BLE_LOG_PRPH_SPI_MASTER_DMA_SCLK_IO_NUM
int "GPIO number of SCLK port for SPI master transport"
default 0
int "GPIO number of SCLK port for SPI master transport (-1: native SPI2 IOMUX)"
default -1
help
GPIO number of SCLK port for SPI master transport
GPIO number of SCLK port for SPI master transport. Set to -1
to use the target's native SPI2 IOMUX pin.
config BLE_LOG_PRPH_SPI_MASTER_DMA_CS_IO_NUM
int "GPIO number of CS port for SPI master transport"
default 0
int "GPIO number of CS port for SPI master transport (-1: native SPI2 IOMUX)"
default -1
help
GPIO number of CS port for SPI master transport
GPIO number of CS port for SPI master transport. Set to -1 to
use the target's native SPI2 IOMUX pin.
endif
if BLE_LOG_PRPH_UART_DMA
components/bt/common/ble_log/src/internal_include/prph/ble_log_prph_spi_common.h
+34
View File
@@ -0,0 +1,34 @@
/*
* SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __BLE_LOG_PRPH_SPI_COMMON_H__
#define __BLE_LOG_PRPH_SPI_COMMON_H__
/* ------------------------------------------------------ */
/* BLE Log - Peripheral Interface - SPI Master Common IO */
/* ------------------------------------------------------ */
/* INCLUDE */
#include "hal/spi_types.h"
#include "soc/spi_pins.h"
/* MACRO */
#define BLE_LOG_SPI_BUS SPI2_HOST
#define BLE_LOG_SPI_MAX_TRANSFER_SIZE (10240)
#define BLE_LOG_SPI_DMA_ALIGN_BYTES (4U)
/* Fall back to the target's native SPI2 IOMUX pin when the configured
* GPIO number is negative. */
#define BLE_LOG_SPI_MOSI_IO_NUM \
(CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_MOSI_IO_NUM < 0 ? \
SPI2_IOMUX_PIN_NUM_MOSI : CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_MOSI_IO_NUM)
#define BLE_LOG_SPI_SCLK_IO_NUM \
(CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_SCLK_IO_NUM < 0 ? \
SPI2_IOMUX_PIN_NUM_CLK : CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_SCLK_IO_NUM)
#define BLE_LOG_SPI_CS_IO_NUM \
(CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_CS_IO_NUM < 0 ? \
SPI2_IOMUX_PIN_NUM_CS : CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_CS_IO_NUM)
#endif /* __BLE_LOG_PRPH_SPI_COMMON_H__ */
components/bt/common/ble_log/src/prph/ble_log_prph_spi_master_dma.c
+4 -6
View File
@@ -9,15 +9,13 @@
/* INCLUDE */
#include "ble_log_prph_spi_master_dma.h"
#include "ble_log_prph_spi_common.h"
#include "ble_log_lbm.h"
#include "esp_timer.h"
/* MACRO */
#define BLE_LOG_SPI_BUS SPI2_HOST
#define BLE_LOG_SPI_MAX_TRANSFER_SIZE (10240)
#define BLE_LOG_SPI_TRANS_ITVL_MIN_US (30)
#define BLE_LOG_SPI_DMA_ALIGN_BYTES (4U)
#define BLE_LOG_SPI_ALIGN_LOG_PERIOD (256U)
#if CONFIG_SPI_MASTER_ISR_IN_IRAM
@@ -64,8 +62,8 @@ bool ble_log_prph_init(size_t trans_cnt)
/* SPI master initialization */
spi_bus_config_t bus_config = {
.miso_io_num = -1,
.mosi_io_num = CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_MOSI_IO_NUM,
.sclk_io_num = CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_SCLK_IO_NUM,
.mosi_io_num = BLE_LOG_SPI_MOSI_IO_NUM,
.sclk_io_num = BLE_LOG_SPI_SCLK_IO_NUM,
.quadwp_io_num = -1,
.quadhd_io_num = -1,
.max_transfer_sz = BLE_LOG_SPI_MAX_TRANSFER_SIZE,
@@ -80,7 +78,7 @@ bool ble_log_prph_init(size_t trans_cnt)
spi_device_interface_config_t dev_config = {
.clock_speed_hz = SPI_MASTER_FREQ_20M,
.mode = 0,
.spics_io_num = CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_CS_IO_NUM,
.spics_io_num = BLE_LOG_SPI_CS_IO_NUM,
.queue_size = trans_cnt,
.post_cb = spi_master_dma_tx_done_cb,
.pre_cb = spi_master_dma_pre_tx_cb,
components/bt/common/ble_log/src/prph/ble_log_prph_spi_master_hd.c
+4 -6
View File
@@ -9,15 +9,13 @@
/* INCLUDE */
#include "ble_log_prph_spi_master_hd.h"
#include "ble_log_prph_spi_common.h"
#include "ble_log_lbm.h"
#include "hal/spi_ll.h"
#include "hal/spi_types.h"
/* MACRO */
#define BLE_LOG_SPI_BUS SPI2_HOST
#define BLE_LOG_SPI_MAX_TRANSFER_SIZE (10240)
#define BLE_LOG_SPI_DMA_ALIGN_BYTES (4U)
#define BLE_LOG_SPI_HD_DATA_DONE BIT(0)
#define BLE_LOG_SPI_HD_END_QUEUE_FAILED BIT(1)
@@ -61,8 +59,8 @@ bool ble_log_prph_init(size_t trans_cnt)
/* SPI master initialization */
spi_bus_config_t bus_config = {
.miso_io_num = -1,
.mosi_io_num = CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_MOSI_IO_NUM,
.sclk_io_num = CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_SCLK_IO_NUM,
.mosi_io_num = BLE_LOG_SPI_MOSI_IO_NUM,
.sclk_io_num = BLE_LOG_SPI_SCLK_IO_NUM,
.quadwp_io_num = -1,
.quadhd_io_num = -1,
.max_transfer_sz = BLE_LOG_SPI_MAX_TRANSFER_SIZE,
@@ -78,7 +76,7 @@ bool ble_log_prph_init(size_t trans_cnt)
spi_device_interface_config_t dev_config = {
.clock_speed_hz = SPI_MASTER_FREQ_20M,
.mode = 0,
.spics_io_num = CONFIG_BLE_LOG_PRPH_SPI_MASTER_DMA_CS_IO_NUM,
.spics_io_num = BLE_LOG_SPI_CS_IO_NUM,
.queue_size = (int)(trans_cnt * 2),
.command_bits = 8,
.address_bits = 8,