Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 03:00:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'docs/fixed_bitscrambler_typo_v6.0' into 'release/v6.0'

Browse Source 
docs(pms): fixed bitscrambler typo in pmu module (v6.0)

See merge request espressif/esp-idf!46792
This commit is contained in:
morris
2026-03-20 13:43:25 +08:00
parent 2c0e86512d ee45f289f4
commit 308feafe23
4 changed files with 18 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/soc/esp32p4/register/hw_ver1/soc/hp_peri_pms_struct.h
+5 -5
View File
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -269,13 +269,13 @@ typedef union {
* 1: Allowed
*/
uint32_t coren_mm_hp_rmt_allow:1;
/** coren_mm_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** coren_mm_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* Configures whether HP CPUn in machine mode has permission to access HP bit
* scrambler.
* 0: Not allowed
* 1: Allowed
*/
uint32_t coren_mm_hp_bitsrambler_allow:1;
uint32_t coren_mm_hp_bitscrambler_allow:1;
/** coren_mm_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* Configures whether HP CPUn in machine mode has permission to access HP AXI ICM.
* 0: Not allowed
@@ -773,12 +773,12 @@ typedef union {
* 1: Allowed
*/
uint32_t coren_um_hp_rmt_allow:1;
/** coren_um_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** coren_um_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* Configures whether HP CPUn in user mode has permission to access HP bit scrambler.
* 0: Not allowed
* 1: Allowed
*/
uint32_t coren_um_hp_bitsrambler_allow:1;
uint32_t coren_um_hp_bitscrambler_allow:1;
/** coren_um_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* Configures whether HP CPUn in user mode has permission to access HP AXI ICM.
* 0: Not allowed
components/soc/esp32p4/register/hw_ver1/soc/lp2hp_peri_pms_struct.h
+2 -2
View File
@@ -269,13 +269,13 @@ typedef union {
* 1: Allowed
*/
uint32_t lp_mm_hp_rmt_allow:1;
/** lp_mm_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** lp_mm_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* Configures whether the LP CPU in machine mode has permission to access HP bit
* scrambler.
* 0: Not allowed
* 1: Allowed
*/
uint32_t lp_mm_hp_bitsrambler_allow:1;
uint32_t lp_mm_hp_bitscrambler_allow:1;
/** lp_mm_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* Configures whether the LP CPU in machine mode has permission to access HP AXI ICM.
* 0: Not allowed
components/soc/esp32p4/register/hw_ver3/soc/hp_peri_pms_struct.h
+9 -9
View File
@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -192,10 +192,10 @@ typedef union {
* NA
*/
uint32_t reg_core0_mm_hp_rmt_allow:1;
/** reg_core0_mm_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** reg_core0_mm_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* NA
*/
uint32_t reg_core0_mm_hp_bitsrambler_allow:1;
uint32_t reg_core0_mm_hp_bitscrambler_allow:1;
/** reg_core0_mm_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* NA
*/
@@ -542,10 +542,10 @@ typedef union {
* NA
*/
uint32_t reg_core0_um_hp_rmt_allow:1;
/** reg_core0_um_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** reg_core0_um_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* NA
*/
uint32_t reg_core0_um_hp_bitsrambler_allow:1;
uint32_t reg_core0_um_hp_bitscrambler_allow:1;
/** reg_core0_um_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* NA
*/
@@ -892,10 +892,10 @@ typedef union {
* NA
*/
uint32_t reg_core1_mm_hp_rmt_allow:1;
/** reg_core1_mm_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** reg_core1_mm_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* NA
*/
uint32_t reg_core1_mm_hp_bitsrambler_allow:1;
uint32_t reg_core1_mm_hp_bitscrambler_allow:1;
/** reg_core1_mm_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* NA
*/
@@ -1242,10 +1242,10 @@ typedef union {
* NA
*/
uint32_t reg_core1_um_hp_rmt_allow:1;
/** reg_core1_um_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** reg_core1_um_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* NA
*/
uint32_t reg_core1_um_hp_bitsrambler_allow:1;
uint32_t reg_core1_um_hp_bitscrambler_allow:1;
/** reg_core1_um_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* NA
*/
components/soc/esp32p4/register/hw_ver3/soc/lp2hp_peri_pms_struct.h
+2 -2
View File
@@ -192,10 +192,10 @@ typedef union {
* NA
*/
uint32_t reg_lp_mm_hp_rmt_allow:1;
/** reg_lp_mm_hp_bitsrambler_allow : R/W; bitpos: [23]; default: 1;
/** reg_lp_mm_hp_bitscrambler_allow : R/W; bitpos: [23]; default: 1;
* NA
*/
uint32_t reg_lp_mm_hp_bitsrambler_allow:1;
uint32_t reg_lp_mm_hp_bitscrambler_allow:1;
/** reg_lp_mm_hp_axi_icm_allow : R/W; bitpos: [24]; default: 1;
* NA
*/