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change(esp_hw_support): use PM_MODEM_STATE_ENABLED to enable related feature

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This commit is contained in:
hebinglin
2026-08-20 16:33:03 +08:00
parent 3f9dfb4649
commit 2b4c200dab
6 changed files with 18 additions and 31 deletions
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2
components/esp_hw_support/linker.lf
View File

@@ -50,7 +50,7 @@ entries:
pmu_sleep (noflash)
if PM_SLEEP_CLK_ICG_ENABLE = y && PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP != y:
pmu_sleep_clock_icg:pmu_sleep_clock_icg_config (noflash)
if IDF_TARGET_ESP32H4 = y && BT_LE_MODEM_STATE_ENABLED = y:
if IDF_TARGET_ESP32H4 = y && PM_MODEM_STATE_ENABLED = y:
pmu_sleep_power:pmu_sleep_power_analog_wait_config (noflash)
pmu_sleep_power:pmu_sleep_power_clock_config (noflash)
sleep_mspi (noflash)

2
components/esp_hw_support/port/esp32h4/CMakeLists.txt
View File

@@ -14,7 +14,7 @@ endif()
if(NOT BOOTLOADER_BUILD)
list(APPEND srcs "sar_periph_ctrl.c")
if(CONFIG_BT_LE_MODEM_STATE_ENABLED)
if(CONFIG_PM_MODEM_STATE_ENABLED)
list(APPEND srcs "pmu_sleep_power.c")
endif()
endif()

9
components/esp_hw_support/port/esp32h4/pmu_sleep.c
View File

@@ -250,15 +250,14 @@ static void pmu_sleep_param_init(pmu_context_t *ctx, const pmu_sleep_param_confi
pmu_ll_set_xtal_stable_wait_cycle(ctx->hal->dev, param->hp_lp.xtal_stable_wait_slow_clk_cycle);
pmu_ll_set_pll_stable_wait_cycle(ctx->hal->dev, param->hp_sys.pll_stable_wait_cycle);
#if CONFIG_BT_LE_MODEM_STATE_ENABLED && CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
#if CONFIG_PM_MODEM_STATE_ENABLED
uint16_t ana_wait[ANALOG_WAIT_CTRL_NUM] = {
0x20, // about 1.6us
param->hp_sys.analog_wait_target_cycle,
param->hp_sys.analog_wait_target_cycle,
};
pmu_sleep_power_analog_wait_config(ctx->priv, ana_wait);
#endif
#if CONFIG_BT_LE_MODEM_STATE_ENABLED && SOC_PM_MODEM_LOCK_CLK_WORKAROUND
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
pmu_hp_clk_power_reg_t hp_ck = { .val = pmu_ll_hp_get_clk_power(ctx->hal->dev, HP(ACTIVE)) };
uint32_t xtalx2_xpd = pmu_ll_hp_get_xtalx2_xpd(ctx->hal->dev, HP(ACTIVE));
pmu_imm_hp_clk_power_reg_t imm = {
@@ -269,7 +268,9 @@ static void pmu_sleep_param_init(pmu_context_t *ctx, const pmu_sleep_param_confi
.tie_high_global_xtalx2_icg = xtalx2_xpd,
};
pmu_sleep_power_clock_config(ctx->priv, imm.val);
#endif
#endif // SOC_PM_MODEM_LOCK_CLK_WORKAROUND
#endif // CONFIG_PM_MODEM_STATE_ENABLED
}
bool pmu_sleep_pll_already_enabled(void)

14
components/esp_hw_support/port/esp32h4/pmu_sleep_power.c
View File

@@ -56,8 +56,6 @@ static esp_err_t sleep_power_system_retention_init(void *arg)
#endif
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
#define SLEEP_POWER_ANA_WAIT_LINK_BASE 10
#define SLEEP_POWER_ANA_WAIT_LINK_ID(_idx) REGDMA_POWER_LINK((SLEEP_POWER_ANA_WAIT_LINK_BASE + (_idx)))
@@ -89,15 +87,11 @@ static esp_err_t sleep_power_analog_wait_ctrl_init(void *arg)
return ESP_OK;
}
#endif
typedef struct {
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
pmu_sleep_power_clock_context_t clock;
#endif
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
pmu_sleep_power_ana_wait_context_t ana_wait;
#endif
} pmu_sleep_power_context_t;
static esp_err_t sleep_power_retention_init(void *arg)
@@ -106,9 +100,7 @@ static esp_err_t sleep_power_retention_init(void *arg)
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
ESP_RETURN_ON_ERROR(sleep_power_system_retention_init(&ctx->clock), TAG, "system retention init failed");
#endif
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
ESP_RETURN_ON_ERROR(sleep_power_analog_wait_ctrl_init(&ctx->ana_wait), TAG, "analog wait ctrl retention init failed");
#endif
return ESP_OK;
}
@@ -120,11 +112,9 @@ static esp_err_t sleep_power_retention_deinit(void *arg)
ctx->clock.regdma_desc[i] = NULL;
}
#endif
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
for (int i = 0; i < ANALOG_WAIT_CTRL_NUM; i++) {
ctx->ana_wait.regdma_desc[i] = NULL;
}
#endif
return ESP_OK;
}
@@ -146,9 +136,7 @@ ESP_SYSTEM_INIT_FN(sleep_power_startup_init, SECONDARY, BIT(0), 108)
} else {
#if PMU_SLEEP_PRIV_ENABLED
pmu_sleep_data_t *data = (pmu_sleep_data_t *)PMU_instance()->priv;
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
data->func[PMU_SLEEP_PRIV_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT] = &power_context.ana_wait;
#endif
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
data->func[PMU_SLEEP_PRIV_MODEM_LOCK_CLK_POWER] = &power_context.clock;
#endif
@@ -158,7 +146,6 @@ ESP_SYSTEM_INIT_FN(sleep_power_startup_init, SECONDARY, BIT(0), 108)
return ESP_OK;
}
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
void pmu_sleep_power_analog_wait_config(void *data, const uint16_t analog_wait[ANALOG_WAIT_CTRL_NUM])
{
pmu_sleep_data_t *data_ctx = (pmu_sleep_data_t *)data;
@@ -174,7 +161,6 @@ void pmu_sleep_power_analog_wait_config(void *data, const uint16_t analog_wait[A
regdma_link_set_write_wait_content(ana_wait_ctx->regdma_desc[i], (uint32_t)analog_wait[i] << PMU_ANA_WAIT_TARGET_S, PMU_ANA_WAIT_TARGET_M);
}
}
#endif
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
void pmu_sleep_power_clock_config(void *data, const uint32_t config)

15
components/esp_hw_support/port/esp32h4/private_include/pmu_param.h
View File

@@ -112,7 +112,7 @@ typedef struct {
const pmu_lp_system_analog_param_t* pmu_lp_system_analog_param_default(pmu_lp_mode_t mode);
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
#if CONFIG_PM_MODEM_STATE_ENABLED
#define ANALOG_WAIT_CTRL_NUM 3 // S2M, M2S, M2A
/**
* @brief Update content of selected analog wait ctrl REGDMA links.
@@ -121,7 +121,6 @@ const pmu_lp_system_analog_param_t* pmu_lp_system_analog_param_default(pmu_lp_mo
* @param analog_wait Update analog wait values at S2M, M2S, M2A retention links.
*/
void pmu_sleep_power_analog_wait_config(void *data, const uint16_t analog_wait[ANALOG_WAIT_CTRL_NUM]);
#endif
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
/**
@@ -131,18 +130,20 @@ void pmu_sleep_power_analog_wait_config(void *data, const uint16_t analog_wait[A
* @param config IMM TIE_HIGH bits to write.
*/
void pmu_sleep_power_clock_config(void *data, const uint32_t config);
#endif
#endif // SOC_PM_MODEM_LOCK_CLK_WORKAROUND
#endif // CONFIG_PM_MODEM_STATE_ENABLED
/* Enabled when this chip needs any pmu_sleep_data_t priv slot; conditions differ per chip. */
#define PMU_SLEEP_PRIV_ENABLED (CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT || SOC_PM_SUPPORT_PMU_RETENTION_CLK_ICG || SOC_PM_MODEM_LOCK_CLK_WORKAROUND)
#define PMU_SLEEP_PRIV_ENABLED (CONFIG_PM_MODEM_STATE_ENABLED || SOC_PM_SUPPORT_PMU_RETENTION_CLK_ICG || SOC_PM_MODEM_LOCK_CLK_WORKAROUND)
#if PMU_SLEEP_PRIV_ENABLED
enum {
#if CONFIG_PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
#if CONFIG_PM_MODEM_STATE_ENABLED
PMU_SLEEP_PRIV_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT,
#endif
#if SOC_PM_MODEM_LOCK_CLK_WORKAROUND
PMU_SLEEP_PRIV_MODEM_LOCK_CLK_POWER,
#endif
#endif // SOC_PM_MODEM_LOCK_CLK_WORKAROUND
#endif // CONFIG_PM_MODEM_STATE_ENABLED
#if SOC_PM_SUPPORT_PMU_RETENTION_CLK_ICG
PMU_SLEEP_PRIV_HW_RETENTION_ICG_CLK,
#endif

7
components/esp_pm/Kconfig
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@@ -338,12 +338,11 @@ menu "Power Management"
keeping all other peripheral clocks gated to minimize sleep
power consumption.
config PM_SKIP_MODEM_TO_ACTIVE_ANALOG_WAIT
config PM_MODEM_STATE_ENABLED
bool
depends on SOC_PM_SUPPORT_PMU_MODEM_STATE
depends on SOC_PM_SUPPORT_PMU_MODEM_STATE && IDF_TARGET_ESP32H4
default n
help
If enabled, the analog wait time when waking up from modem to active state will be skipped.
This will reduce the wakeup time.
If enabled, the modem state is supported. Note: This option is only supported on ESP32H4.
endmenu # "Power Management"