Mirrors/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-02 03:00:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'feature/esp32c61_flash_psram_timing_tuning_v6.0' into 'release/v6.0'

Browse Source 
feat(mspi): support 120MHz flash and psram for esp32c61 (v6.0)

See merge request espressif/esp-idf!45886
This commit is contained in:
morris
2026-03-20 13:55:06 +08:00
parent 308feafe23 c7ae253b89
commit 23e199d646
38 changed files with 135 additions and 272 deletions
Download Patch File Download Diff File Expand all files Collapse all files
components/soc/esp32s2/include/soc/Kconfig.soc_caps.in
-16
View File
@@ -627,22 +627,6 @@ config SOC_MEMSPI_IS_INDEPENDENT
bool
default y
config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
bool
default y
config SOC_SYSTIMER_COUNTER_NUM
int
default 1
components/soc/esp32s2/include/soc/soc_caps.h
-4
View File
@@ -292,10 +292,6 @@
#define SOC_SPI_SCT_CONF_BITLEN_MAX 0x7FFFFD //23 bit wide reg
#define SOC_MEMSPI_IS_INDEPENDENT 1
#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
/*-------------------------- SYSTIMER CAPS ----------------------------------*/
#define SOC_SYSTIMER_COUNTER_NUM (1U) // Number of counter units