Merge branch 'feature/esp32c61_flash_psram_timing_tuning_v6.0' into 'release/v6.0'

feat(mspi): support 120MHz flash and psram for esp32c61 (v6.0)

See merge request espressif/esp-idf!45886
This commit is contained in:
morris
2026-03-20 13:55:06 +08:00
38 changed files with 135 additions and 272 deletions
@@ -527,22 +527,6 @@ config SOC_SPI_MEM_SUPPORT_WRAP
bool
default y
config SOC_MEMSPI_SRC_FREQ_60M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_30M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
bool
default y
config SOC_MEMSPI_SRC_FREQ_15M_SUPPORTED
bool
default y
config SOC_SYSTIMER_COUNTER_NUM
int
default 2
@@ -247,11 +247,6 @@
#define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1)
#define SOC_SPI_MEM_SUPPORT_WRAP (1)
#define SOC_MEMSPI_SRC_FREQ_60M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_30M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_15M_SUPPORTED 1
/*-------------------------- SYSTIMER CAPS ----------------------------------*/
#define SOC_SYSTIMER_COUNTER_NUM 2 // Number of counter units
#define SOC_SYSTIMER_ALARM_NUM 3 // Number of alarm units