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Merge branch 'feature/esp32c61_flash_psram_timing_tuning_v6.0' into 'release/v6.0'

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feat(mspi): support 120MHz flash and psram for esp32c61 (v6.0)

See merge request espressif/esp-idf!45886
This commit is contained in:
morris
2026-03-20 13:55:06 +08:00
parent 308feafe23 c7ae253b89
commit 23e199d646
38 changed files with 135 additions and 272 deletions
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components/esp_hal_mspi/esp32c5/include/hal/mspi_ll.h
-3
View File
@@ -61,9 +61,6 @@ static inline __attribute__((always_inline)) void mspi_timing_ll_set_core_clock(
case 120:
divider = 4;
break;
case 240:
divider = 2;
break;
default:
HAL_ASSERT(false);
}
components/esp_hal_mspi/esp32c61/include/hal/mspi_ll.h
+13 -1
View File
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -229,6 +229,18 @@ static inline void mspi_timing_ll_set_flash_extra_dummy(uint8_t mspi_id, uint8_t
REG_SET_BIT(SPI_MEM_TIMING_CALI_REG(MSPI_TIMING_LL_MSPI_ID_0), SPI_MEM_TIMING_CALI_UPDATE);
}
/**
* Set MSPI Flash user dummy
*
* @param mspi_id SPI0 / SPI1
* @param user_dummy user dummy
*/
__attribute__((always_inline))
static inline void mspi_timing_ll_set_flash_user_dummy(uint8_t mspi_id, uint8_t user_dummy)
{
REG_SET_FIELD(SPI_MEM_USER1_REG(mspi_id), SPI_MEM_USR_DUMMY_CYCLELEN, user_dummy);
}
/**
* Get MSPI flash dummy info
*