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Merge branch 'feature/update-openocd-to-v0.12.0-esp32-20260831_v6.0' into 'release/v6.0'
feat(tools): update openocd version to v0.12.0-esp32-20260831 (v6.0) See merge request espressif/esp-idf!52392
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@@ -403,18 +403,25 @@ menu "ESP System Settings"
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which does some useful debugging stuff, e.g. GCOV data dump.
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config ESP_DEBUG_INCLUDE_OCD_STUB_BINS
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bool "Preload OpenOCD stub binaries to speed up debugging. 8K memory will be reserved"
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bool "Preload OpenOCD stub binaries to speed up debugging. 12K memory will be reserved"
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default n
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depends on SOC_DEBUG_HAVE_OCD_STUB_BINS
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depends on !IDF_TARGET_ESP32P4 || ESP32P4_SELECTS_REV_LESS_V3 || CACHE_L2_CACHE_512KB
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help
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OpenOCD uses stub code to access flash during programming or when inserting and removing
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SW flash breakpoints.
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To execute stub code, OpenOCD allocates memory on the target device, backs up the existing memory,
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loads the stub binary, runs the binary, and then restores the original memory.
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This process can be time-consuming, especially when using USB serial JTAG.
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By enabling this option, 8K of memory in RAM will be preallocated with the stub code,
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By enabling this option, 12K of memory in RAM will be preallocated with the stub code,
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eliminating the need to back up and restore the memory region.
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The stub binaries are prebuilt and linked to run at the start of IRAM (_iram_start).
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On ESP32-P4 rev >= v3, _iram_start is 0x4FF00000 + L2 cache size, so it only matches the
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stub's link address (0x4FF80000) when the L2 cache is 512KB. This option is therefore
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only available on ESP32-P4 rev >= v3 when CACHE_L2_CACHE_512KB is selected. Earlier P4
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revisions and other targets place _iram_start at a fixed address and are not affected.
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config ESP_DEBUG_OCDAWARE
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bool "Make exception and panic handlers JTAG/OCD aware"
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default y
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@@ -9,14 +9,14 @@
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/* Do not move this block! OpenOCD expects this to be at the beginning of IRAM. */
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KEEP(*(.ocd_stub.code));
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KEEP(*(.ocd_stub.tramp));
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. = ALIGN(0x800);
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. = ALIGN(0x1000);
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KEEP(*(.ocd_stub.data));
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KEEP(*(.ocd_stub.bss));
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KEEP(*(.ocd_stub.stack));
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KEEP(*(.ocd_stub.params));
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. = ALIGN(0x1000);
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KEEP(*(.ocd_stub.scratchmem));
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ASSERT(ABSOLUTE(.) == _iram_start + 0x2000, "openocd stub memory must be ended at _iram_start + 0x2000");
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ASSERT(ABSOLUTE(.) == _iram_start + 0x3000, "openocd stub memory must be ended at _iram_start + 0x3000");
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#endif
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/* Vectors go to start of IRAM */
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@@ -15,10 +15,14 @@ set(openocd_path $ENV{OPENOCD_SCRIPTS})
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if(openocd_path)
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set(stub_bin_path ${openocd_path}/../espressif/stub_bins)
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if(IS_DIRECTORY ${stub_bin_path} AND IS_DIRECTORY ${stub_bin_path}/${target})
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set(code_bin "${stub_bin_path}/${target}/stub_flash_idf_binary_code.inc")
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set(data_bin "${stub_bin_path}/${target}/stub_flash_idf_binary_data.inc")
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set(img_header "${stub_bin_path}/${target}/stub_flash_idf_image.h")
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set(stub_target_dir ${target})
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if(target STREQUAL "esp32p4" AND CONFIG_ESP32P4_REV_MIN_FULL LESS 300)
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set(stub_target_dir "esp32p4-rev1")
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endif()
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if(IS_DIRECTORY ${stub_bin_path} AND IS_DIRECTORY ${stub_bin_path}/${stub_target_dir})
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set(code_bin "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_binary_code.inc")
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set(data_bin "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_binary_data.inc")
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set(img_header "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_image.h")
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if(EXISTS ${code_bin} AND EXISTS ${data_bin} AND EXISTS ${img_header})
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set(dest_dir "${CMAKE_BINARY_DIR}/openocd_stub_bins")
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set(output_code_bin "${dest_dir}/stub_flash_idf_binary_code.inc")
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