Merge branch 'feature/update-openocd-to-v0.12.0-esp32-20260831_v6.0' into 'release/v6.0'

feat(tools): update openocd version to v0.12.0-esp32-20260831 (v6.0)

See merge request espressif/esp-idf!52392
This commit is contained in:
Alexey Gerenkov
2026-09-04 17:32:14 +08:00
22 changed files with 101 additions and 40 deletions
+9 -2
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@@ -403,18 +403,25 @@ menu "ESP System Settings"
which does some useful debugging stuff, e.g. GCOV data dump.
config ESP_DEBUG_INCLUDE_OCD_STUB_BINS
bool "Preload OpenOCD stub binaries to speed up debugging. 8K memory will be reserved"
bool "Preload OpenOCD stub binaries to speed up debugging. 12K memory will be reserved"
default n
depends on SOC_DEBUG_HAVE_OCD_STUB_BINS
depends on !IDF_TARGET_ESP32P4 || ESP32P4_SELECTS_REV_LESS_V3 || CACHE_L2_CACHE_512KB
help
OpenOCD uses stub code to access flash during programming or when inserting and removing
SW flash breakpoints.
To execute stub code, OpenOCD allocates memory on the target device, backs up the existing memory,
loads the stub binary, runs the binary, and then restores the original memory.
This process can be time-consuming, especially when using USB serial JTAG.
By enabling this option, 8K of memory in RAM will be preallocated with the stub code,
By enabling this option, 12K of memory in RAM will be preallocated with the stub code,
eliminating the need to back up and restore the memory region.
The stub binaries are prebuilt and linked to run at the start of IRAM (_iram_start).
On ESP32-P4 rev >= v3, _iram_start is 0x4FF00000 + L2 cache size, so it only matches the
stub's link address (0x4FF80000) when the L2 cache is 512KB. This option is therefore
only available on ESP32-P4 rev >= v3 when CACHE_L2_CACHE_512KB is selected. Earlier P4
revisions and other targets place _iram_start at a fixed address and are not affected.
config ESP_DEBUG_OCDAWARE
bool "Make exception and panic handlers JTAG/OCD aware"
default y
+2 -2
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@@ -9,14 +9,14 @@
/* Do not move this block! OpenOCD expects this to be at the beginning of IRAM. */
KEEP(*(.ocd_stub.code));
KEEP(*(.ocd_stub.tramp));
. = ALIGN(0x800);
. = ALIGN(0x1000);
KEEP(*(.ocd_stub.data));
KEEP(*(.ocd_stub.bss));
KEEP(*(.ocd_stub.stack));
KEEP(*(.ocd_stub.params));
. = ALIGN(0x1000);
KEEP(*(.ocd_stub.scratchmem));
ASSERT(ABSOLUTE(.) == _iram_start + 0x2000, "openocd stub memory must be ended at _iram_start + 0x2000");
ASSERT(ABSOLUTE(.) == _iram_start + 0x3000, "openocd stub memory must be ended at _iram_start + 0x3000");
#endif
/* Vectors go to start of IRAM */
@@ -15,10 +15,14 @@ set(openocd_path $ENV{OPENOCD_SCRIPTS})
if(openocd_path)
set(stub_bin_path ${openocd_path}/../espressif/stub_bins)
if(IS_DIRECTORY ${stub_bin_path} AND IS_DIRECTORY ${stub_bin_path}/${target})
set(code_bin "${stub_bin_path}/${target}/stub_flash_idf_binary_code.inc")
set(data_bin "${stub_bin_path}/${target}/stub_flash_idf_binary_data.inc")
set(img_header "${stub_bin_path}/${target}/stub_flash_idf_image.h")
set(stub_target_dir ${target})
if(target STREQUAL "esp32p4" AND CONFIG_ESP32P4_REV_MIN_FULL LESS 300)
set(stub_target_dir "esp32p4-rev1")
endif()
if(IS_DIRECTORY ${stub_bin_path} AND IS_DIRECTORY ${stub_bin_path}/${stub_target_dir})
set(code_bin "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_binary_code.inc")
set(data_bin "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_binary_data.inc")
set(img_header "${stub_bin_path}/${stub_target_dir}/stub_flash_idf_image.h")
if(EXISTS ${code_bin} AND EXISTS ${data_bin} AND EXISTS ${img_header})
set(dest_dir "${CMAKE_BINARY_DIR}/openocd_stub_bins")
set(output_code_bin "${dest_dir}/stub_flash_idf_binary_code.inc")