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Merge branch 'feat/esp_macro_align_up_down' into 'master'

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refactor(esp_common): centralize ALIGN_UP/ALIGN_DOWN into esp_macros.h

See merge request espressif/esp-idf!50335
This commit is contained in:
morris
2026-07-06 19:09:14 +08:00
parent 4eaa03abf5 651d6a283f
commit 18f50fefa9
66 changed files with 241 additions and 309 deletions
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2
components/esp_driver_dma/src/dw_gdma.c
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@@ -56,8 +56,6 @@ ESP_LOG_ATTR_TAG(TAG, "dw-gdma");
#define DW_GDMA_ALLOW_INTR_PRIORITY_MASK ESP_INTR_FLAG_LOWMED
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
typedef struct dw_gdma_group_t dw_gdma_group_t;
typedef struct dw_gdma_channel_t dw_gdma_channel_t;

2
components/esp_driver_dma/src/esp_dma_utils.c
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@@ -26,8 +26,6 @@
ESP_LOG_ATTR_TAG(TAG, "dma_utils");
#define ALIGN_UP_BY(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
esp_err_t esp_dma_split_rx_buffer_to_cache_aligned(void *rx_buffer, size_t buffer_len, dma_buffer_split_array_t *align_buf_array, uint8_t** ret_stash_buffer)
{
esp_err_t ret = ESP_OK;

12
components/esp_driver_dma/src/gdma_link.c
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@@ -20,12 +20,10 @@
#include "hal/cache_ll.h"
#include "esp_cache.h"
#include "esp_efuse.h"
#include "esp_macros.h"
ESP_LOG_ATTR_TAG(TAG, "gdma-link");
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
#define ALIGN_DOWN(num, align) ((num) & ~((align) - 1))
// GDMA link list item definition
// TODO: this type will eventually become target specific, we need to move it to the LL layer or soc layer
typedef struct gdma_link_list_item_t gdma_link_list_item_t;
@@ -71,7 +69,7 @@ esp_err_t gdma_new_link_list(const gdma_link_list_config_t *config, gdma_link_li
uint32_t num_items = config->num_items;
size_t item_alignment = config->item_alignment ? config->item_alignment : 4;
// each list item should align to the specified alignment
size_t item_size = ALIGN_UP(sizeof(gdma_link_list_item_t), item_alignment);
size_t item_size = ESP_ALIGN_UP(sizeof(gdma_link_list_item_t), item_alignment);
// guard against overflow when calculating total bytes for descriptors
ESP_GOTO_ON_FALSE(num_items <= SIZE_MAX / item_size, ESP_ERR_INVALID_SIZE, err, TAG, "list too big");
@@ -100,7 +98,7 @@ esp_err_t gdma_new_link_list(const gdma_link_list_config_t *config, gdma_link_li
}
if (data_cache_line_size) {
// write back and then invalidate the cache, because later we will read/write the link list items by non-cached address
ESP_GOTO_ON_ERROR(esp_cache_msync(items, ALIGN_UP(num_items * item_size, data_cache_line_size),
ESP_GOTO_ON_ERROR(esp_cache_msync(items, ESP_ALIGN_UP(num_items * item_size, data_cache_line_size),
ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE),
err, TAG, "cache sync failed");
}
@@ -192,7 +190,7 @@ esp_err_t gdma_link_mount_buffers(gdma_link_list_handle_t list, int start_item_i
}
// alignment must be a power of 2
ESP_RETURN_ON_FALSE_ISR((buffer_alignment & (buffer_alignment - 1)) == 0, ESP_ERR_INVALID_ARG, TAG, "align err idx=%"PRIu32" align=%"PRIu32, bi, buffer_alignment);
size_t max_buffer_mount_length = ALIGN_DOWN(GDMA_MAX_BUFFER_SIZE_PER_LINK_ITEM, buffer_alignment);
size_t max_buffer_mount_length = ESP_ALIGN_DOWN(GDMA_MAX_BUFFER_SIZE_PER_LINK_ITEM, buffer_alignment);
if (!config->flags.bypass_buffer_align_check) {
ESP_RETURN_ON_FALSE_ISR(((uintptr_t)buf & (buffer_alignment - 1)) == 0, ESP_ERR_INVALID_ARG, TAG, "buf misalign idx=%"PRIu32" align=%"PRIu32, bi, buffer_alignment);
if (esp_efuse_is_flash_encryption_enabled()) {
@@ -219,7 +217,7 @@ esp_err_t gdma_link_mount_buffers(gdma_link_list_handle_t list, int start_item_i
if (buffer_alignment == 0) {
buffer_alignment = 1;
}
size_t max_buffer_mount_length = ALIGN_DOWN(GDMA_MAX_BUFFER_SIZE_PER_LINK_ITEM, buffer_alignment);
size_t max_buffer_mount_length = ESP_ALIGN_DOWN(GDMA_MAX_BUFFER_SIZE_PER_LINK_ITEM, buffer_alignment);
// skip zero-length buffer but scrub any stale descriptor to keep ring clean; no slot consumption
if (len == 0 || buf == NULL) {
lli_nc = (gdma_link_list_item_t *)(list->items_nc + begin_item_idx % list_item_capacity * item_size);

6
components/esp_driver_dma/test_apps/dma/main/test_gdma.c
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@@ -25,9 +25,7 @@
#include "esp_memory_utils.h"
#include "gdma_test_utils.h"
#include "esp_efuse.h"
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
#define ALIGN_DOWN(num, align) ((num) & ~((align) - 1))
#include "esp_macros.h"
TEST_CASE("GDMA channel allocation", "[GDMA]")
{
@@ -573,7 +571,7 @@ static void test_gdma_m2m_unaligned_buffer_test(uint8_t *dst_data, uint8_t *src_
}
if (sram_alignment) {
// do write-back for the source data because it's in the cache
TEST_ESP_OK(esp_cache_msync(src_data, ALIGN_UP(data_length, sram_alignment), ESP_CACHE_MSYNC_FLAG_DIR_C2M));
TEST_ESP_OK(esp_cache_msync(src_data, ESP_ALIGN_UP(data_length, sram_alignment), ESP_CACHE_MSYNC_FLAG_DIR_C2M));
}
gdma_buffer_mount_config_t tx_buf_mount_config[] = {

7
components/esp_driver_dma/test_apps/dma2d/main/test_dma2d.c
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@@ -18,8 +18,7 @@
#include "esp_heap_caps.h"
#include "esp_cache.h"
#include "esp_efuse.h"
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))
#include "esp_macros.h"
// All test will perform `M2M_TRANS_TIMES` times memcpy transactions, utilizing all available 2D-DMA channels.
// This tests the hardware capability of multiple 2D-DMA transactions running together, and the driver capbility of
@@ -623,9 +622,9 @@ TEST_CASE("DMA2D_M2M_2D_window", "[DMA2D]")
uint8_t *prtx;
uint8_t *prrx;
size_t tx_buf_size = ALIGN_UP(vb * hb * 2, 64); // buffer msync alignment restriction
size_t tx_buf_size = ESP_ALIGN_UP(vb * hb * 2, 64); // buffer msync alignment restriction
uint8_t *tx_buf = heap_caps_aligned_calloc(64, tx_buf_size * M2M_TRANS_TIMES, sizeof(uint8_t), buf_malloc_cap);
size_t rx_buf_size = ALIGN_UP(va * ha * 2, 64); // buffer msync alignment restriction
size_t rx_buf_size = ESP_ALIGN_UP(va * ha * 2, 64); // buffer msync alignment restriction
uint8_t *rx_buf = heap_caps_aligned_calloc(64, rx_buf_size * M2M_TRANS_TIMES, sizeof(uint8_t), buf_malloc_cap);
TEST_ASSERT_NOT_NULL(tx_buf);
TEST_ASSERT_NOT_NULL(rx_buf);