Jiang Jiang Jian cd2a4df5fa Merge branch 'fix/disable_pvt_for_esp32c5_v6.0' into 'release/v6.0' ...

feat(esp32c5): disable PVT feature for esp32c5 (v6.0)

See merge request espressif/esp-idf!45702

2026-02-12 15:47:21 +08:00

..

arch

refactor: avoid function calls inside MIN/MAX macros

2025-11-18 15:18:14 +08:00

include

feat(esp_tee): Add support for the RISC-V H/W stack guard mechanism

2026-01-29 11:49:14 +05:30

soc

Merge branch 'fix/disable_pvt_for_esp32c5_v6.0' into 'release/v6.0'

2026-02-12 15:47:21 +08:00

CMakeLists.txt

fix(clk): 400MHz CPU should still be selectable on ESP32-P4 less than rev3

2025-11-12 22:28:03 +08:00

cpu_start.c

Merge branch 'fix/esp32_flash_cache_crash_v6.0' into 'release/v6.0'

2026-02-01 10:20:19 +08:00

esp_ipc_isr.c

feat(esp_system): Adds Kconfigs to place code in IRAM

2025-06-23 13:23:33 +03:00

esp_system_chip.c

refactor(uart)!: deprcated esp_rom_uart.h

2025-07-08 18:56:17 +08:00

esp_system_linux.c

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image_process.c

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panic_handler.c

remove(esp_hw_support): Remove redundant and unsupported memprot mentions

2025-08-04 11:43:01 +05:30