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This commit reorganizes SPI flash header files to better reflect their visibility and intended usage: 1. Rename `esp_flash_port/` to `esp_flash_chips/`: - Better reflects that these headers are for chip driver implementations - All chip driver headers moved to `esp_flash_chips/` directory - Added README.md explaining semi-public nature of these headers 2. Move internal headers to `esp_private/`: - `esp_flash_internal.h` -> `esp_private/esp_flash_internal.h` - `memspi_host_driver.h` -> `esp_private/memspi_host_driver.h` 3. Move chip driver related headers to `esp_flash_chips/`: - `esp_private/esp_flash_types.h` -> `esp_flash_chips/esp_flash_types.h` - `spi_flash/spi_flash_defs.h` -> `esp_flash_chips/spi_flash_defs.h` - `spi_flash_override.h` -> `esp_flash_chips/spi_flash_override.h` - All `spi_flash_chip_*.h` headers moved to `esp_flash_chips/` 4. Code improvements: - Remove unused includes (e.g., `spi_flash_override.h` from `cache_utils.c`) - Use public API `esp_flash_get_size()` instead of direct member access - Add `esp_flash_is_quad_mode` to linker.lf for IRAM placement 5. Documentation updates: - Add README.md in `esp_flash_chips/` explaining semi-public headers - Update programming guide with warnings about internal headers - Update both English and Chinese documentation 6. Update all references across the codebase: - Update includes in `spi_flash` component - Update `bootloader_support`, `app_update`, `esp_tee`, `espcoredump` - Update example projects Breaking changes: - Headers moved to new locations require include path updates - `custom_flash_driver` example temporarily disabled until external components are updated
160 lines
4.5 KiB
C
160 lines
4.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_check.h"
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#include "esp_system.h"
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#include "esp_log.h"
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#include "esp_newlib.h"
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#include "esp_xt_wdt.h"
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#include "esp_cpu.h"
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#include "esp_private/startup_internal.h"
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#include "freertos/FreeRTOS.h"
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#include "soc/soc_caps.h"
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#include "hal/wdt_hal.h"
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#include "hal/uart_types.h"
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#include "hal/uart_ll.h"
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#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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#include "private/esp_coexist_internal.h"
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#endif
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#if CONFIG_PM_ENABLE || CONFIG_PM_WORKAROUND_FREQ_LIMIT_ENABLED
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#include "esp_pm.h"
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#include "esp_private/pm_impl.h"
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#endif
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#include "esp_private/esp_clk.h"
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#include "esp_private/brownout.h"
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#include "esp_private/vbat.h"
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#include "esp_rom_caps.h"
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#include "esp_rom_sys.h"
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#if SOC_BOD_SUPPORTED
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#include "hal/brownout_ll.h"
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#endif
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// Using the same tag as in startup.c to keep the logs unchanged
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ESP_LOG_ATTR_TAG(TAG, "cpu_start");
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// Hook to force the linker to include this file
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void esp_system_include_startup_funcs(void)
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{
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}
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// [refactor-todo] Most of these init functions should be moved to the respective components.
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ESP_SYSTEM_INIT_FN(init_show_cpu_freq, CORE, BIT(0), 10)
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{
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ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
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int cpu_freq = esp_clk_cpu_freq();
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ESP_EARLY_LOGI(TAG, "cpu freq: %d Hz", cpu_freq);
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return ESP_OK;
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}
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/* NOTE: When ESP-TEE is enabled, the Brownout Detection module is part
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* of the TEE and is initialized in the TEE startup routine itself.
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* It is protected from all REE accesses through memory protection mechanisms,
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* as it is a critical module for device functioning.
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*/
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#if SOC_BOD_SUPPORTED && !CONFIG_SECURE_ENABLE_TEE
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ESP_SYSTEM_INIT_FN(init_brownout, CORE, BIT(0), 105)
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{
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// [refactor-todo] leads to call chain rtc_is_register (driver) -> esp_intr_alloc (esp32/esp32s2) ->
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// malloc (esp_libc) -> heap_caps_malloc (heap), so heap must be at least initialized
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esp_err_t ret = ESP_OK;
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// BOD and VBAT share the same interrupt number. To avoid blocking the system in an intermediate state
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// where an interrupt occurs and the interrupt number is enabled, but the ISR is not configured, enable
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// the interrupt after configuring both ISRs.
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portDISABLE_INTERRUPTS();
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#if CONFIG_ESP_BROWNOUT_DET
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esp_brownout_init();
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#else
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#if SOC_CAPS_NO_RESET_BY_ANA_BOD
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brownout_ll_ana_reset_enable(false);
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#endif // SOC_CAPS_NO_RESET_BY_ANA_BOD
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#endif // CONFIG_ESP_BROWNOUT_DET
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#if CONFIG_ESP_VBAT_INIT_AUTO
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ret = esp_vbat_init();
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#endif
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portENABLE_INTERRUPTS();
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return ret;
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}
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#endif
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ESP_SYSTEM_INIT_FN(init_newlib_time, CORE, BIT(0), 106)
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{
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esp_libc_time_init();
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return ESP_OK;
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}
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#if CONFIG_ESP_XT_WDT
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ESP_SYSTEM_INIT_FN(init_xt_wdt, CORE, BIT(0), 170)
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{
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esp_xt_wdt_config_t cfg = {
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.timeout = CONFIG_ESP_XT_WDT_TIMEOUT,
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.auto_backup_clk_enable = CONFIG_ESP_XT_WDT_BACKUP_CLK_ENABLE,
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};
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return esp_xt_wdt_init(&cfg);
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}
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#endif // CONFIG_ESP_XT_WDT
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#if CONFIG_PM_ENABLE
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ESP_SYSTEM_INIT_FN(init_pm, SECONDARY, BIT(0), 201)
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{
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esp_pm_impl_init();
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return ESP_OK;
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}
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#endif // CONFIG_PM_ENABLE
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#if SOC_APB_BACKUP_DMA
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ESP_SYSTEM_INIT_FN(init_apb_dma, SECONDARY, BIT(0), 203)
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{
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extern void esp_apb_backup_dma_lock_init(void);
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esp_apb_backup_dma_lock_init();
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return ESP_OK;
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}
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#endif
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#if CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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ESP_SYSTEM_INIT_FN(init_coexist, SECONDARY, BIT(0), 204)
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{
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esp_coex_adapter_register(&g_coex_adapter_funcs);
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coex_pre_init();
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return ESP_OK;
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}
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#endif // CONFIG_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
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#if SOC_RECOVERY_BOOTLOADER_SUPPORTED
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ESP_SYSTEM_INIT_FN(init_bootloader_offset, SECONDARY, BIT(0), 205)
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{
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// The bootloader offset variable in ROM is stored in a memory that will be reclaimed by heap component.
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// Reading it before the heap is initialized helps to preserve the value.
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volatile int bootloader_offset = esp_rom_get_bootloader_offset();
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(void)bootloader_offset;
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return ESP_OK;
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}
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#endif // SOC_RECOVERY_BOOTLOADER_SUPPORTED
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#ifndef CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE
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ESP_SYSTEM_INIT_FN(init_disable_rtc_wdt, SECONDARY, BIT(0), 999)
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{
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wdt_hal_context_t rtc_wdt_ctx = RWDT_HAL_CONTEXT_DEFAULT();
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wdt_hal_write_protect_disable(&rtc_wdt_ctx);
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wdt_hal_disable(&rtc_wdt_ctx);
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wdt_hal_write_protect_enable(&rtc_wdt_ctx);
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return ESP_OK;
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}
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#endif // CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE
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