Logo
Explore Help
Sign In
Mirrors/esp-idf
Watch 1
Star 0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2026-10-01 02:30:52 +03:00
Code Issues Packages Projects Releases Wiki Activity
Files
ecfdeef9d7e309fa94b7f1df9a9de792da9f38eb
esp-idf/components/riscv
T
History
Marius VikhammerandCursor 8f6ea2a1ba test(ci): re-enable ESP32-H4 in core system test apps
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-05-13 09:00:12 +08:00
..
include
test(ci): re-enable ESP32-H4 in core system test apps
2026-05-13 09:00:12 +08:00
ld
…
CMakeLists.txt
feat(esp_tee): Support for ESP32-C5 - the rest of the components
2025-08-13 14:08:59 +05:30
instruction_decode.c
refactor(tools): Tidy up core component files copyright ignore
2024-01-22 18:07:35 +08:00
interrupt_clic.c
fix(riscv): implement a workaround for Zcmp hardware bug
2026-04-10 15:03:09 +08:00
interrupt_intc.c
…
interrupt_plic.c
refactor(esp_tee): Revised the secure service ID numbering scheme
2025-01-23 12:39:19 +05:30
interrupt.c
feat(intr): basic interrupt/freertos support for C61
2024-06-12 09:25:47 +08:00
linker.lf
refactor(esp32c61): bus_monitor backward compatible refactor
2025-04-08 22:50:04 +08:00
rv_utils.c
refactor(esp32c61): bus_monitor backward compatible refactor
2025-04-08 22:50:04 +08:00
vectors_clic.S
change(riscv): Remove redundant definition of MEMPROT_ISR
2025-08-04 11:43:01 +05:30
vectors_intc.S
refactor(esp_system): Update all references of the memory protection configs
2025-08-04 11:43:01 +05:30
vectors.S
fix(riscv): implement a workaround for Zcmp hardware bug
2026-04-10 15:03:09 +08:00
Powered by Gitea Version: 1.27.3 Page: 1205ms Template: 7ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API