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cddc6685f11a9823f4d80b1a04373633071f498c
esp-idf/components/soc
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Aditya Patwardhan cddc6685f1 Merge branch 'feature/enable_support_for_deterministic_mode_and_ecdsa_192_v5.3' into 'release/v5.3' 
Feature/enable support for deterministic mode and ecdsa 192 v5.3

See merge request espressif/esp-idf!40102
2025-06-25 14:37:58 +05:30
..
esp32
refactor(touch): adjust touch channel number on P4 from 0-13 to 1-14
2025-06-13 19:44:38 +08:00
esp32c2
fix(cache): fixed SOC_CACHE_FREEZE_SUPPORTED not defined on c3/c2 issue
2025-06-24 15:44:56 +08:00
esp32c3
fix(cache): fixed SOC_CACHE_FREEZE_SUPPORTED not defined on c3/c2 issue
2025-06-24 15:44:56 +08:00
esp32c5
fix(uart): LP UART does not have the pre-divider for its clock source
2025-05-22 11:51:19 +08:00
esp32c6
fix(uart): LP UART does not have the pre-divider for its clock source
2025-05-22 11:51:19 +08:00
esp32c61
fix(esp_hw_support): fix esp32p4 xtal_xpd depends on TOP power domain
2025-04-16 15:43:05 +08:00
esp32h2
feat: enable support for deterministic mode for esp32h2
2025-06-25 10:51:01 +05:30
esp32p4
refactor(touch): adjust touch channel number on P4 from 0-13 to 1-14
2025-06-13 19:44:38 +08:00
esp32s2
refactor(touch): adjust touch channel number on P4 from 0-13 to 1-14
2025-06-13 19:44:38 +08:00
esp32s3
refactor(touch): adjust touch channel number on P4 from 0-13 to 1-14
2025-06-13 19:44:38 +08:00
include/soc
feat(sdmmc): Concurrent use of SDMMC peripheral
2025-05-05 18:58:58 +08:00
linux/include/soc
feat(esp32c5): support esp32c5 g0 components
2023-12-08 15:12:24 +08:00
CMakeLists.txt
refactor(ecdsa): rely on efuse to get chip revision
2025-02-26 17:04:27 +05:30
dport_access_common.c
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
Kconfig
mmu: support configurable mmu page size
2023-03-04 02:48:40 +00:00
linker.lf
soc: move implementations to esp_hw_support
2020-10-28 22:38:50 +08:00
lldesc.c
crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc
2021-05-18 11:25:41 +08:00
README.md
soc: descriptive part occupy whole component
2020-10-28 07:21:29 +08:00

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware