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ESP32-S31 uses the same trace encoder IP as ESP32-P4. Of the E-Trace v2.0 parameters the two targets report, only privilege_width_p differs (1 on P4, 2 on S31), and it affects both the sync packet layout and the filter's privilege selector. - Add the SOC_RISCV_TRACE_* caps for ESP32-S31 along with the esp32s31 LL, and declare TRACE0/TRACE1 in the target's trace_struct.h. - Carry privilege_width_p as SOC_RISCV_TRACE_PRIV_WIDTH so the sync packet decoder can locate the address field, which starts one bit later on targets that implement supervisor mode. - Use the RISC-V architectural privilege encoding (0 user, 1 supervisor, 3 machine) in the public filter enum so the values do not change per target, and let each LL narrow them to its own register field. - Add riscv_trace_ll_priv_is_supported() per target, so a privilege level the selector cannot represent is rejected with ESP_ERR_NOT_SUPPORTED rather than being silently narrowed to a different level. It lives next to the narrowing code so the two cannot drift apart. - Fix trace buffer allocation on targets whose internal RAM is not reached through a cache. esp_cache_get_alignment() reports 0 there, which underflowed the size check and failed every allocation. Align base and size to the larger of the reported cache line and the encoder's 4-byte write granularity.
The SoC component
The soc component provides register-level descriptions for targets supported by ESP-IDF.
| File | Description |
|---|---|
xxx_reg.h/xx_struct.h |
Defines registers layout of a specific module. These files are automated, and should not be updated manually. Please note the register names and layout are subject to change between different chip series. |
xxx_pins.h |
Defines the unchangeable GPIOs used by a specific module. e.g. if a high speed signal is routed through IO MUX, its corresponding GPIO is not selectable. |
soc_caps.h |
Describes the differences in capabilities between different chips. The macros here can also affect cmake build system, Kconfig system, docs system, pytest and CI environment. Changes to this file requires extra caution as they are part of the public API. |
xxx_periph.h |
This is the portal for each peripheral module at the SoC layer, containing all relevant register header files and organizing other key information, such as interrupt sources, hardware signal IDs, etc. |
xxx.peripherals.ld |
This is the linker script that defines each module's memory address. |
The SoC Capabilities
soc_caps.h file describes the SoC capabilities. To used the soc capability macros, you should use the macro functions offered by soc/soc_caps_eval.h.
| Macro function | Description | Example |
|---|---|---|
SOC_IS |
Checks if the current SoC is a specific one. | SOC_IS(ESP32) |
SOC_HAS |
Checks if the current SoC has a specific module. | SOC_HAS(DAC) |
SOC_MODULE_ATTR |
Get the attribute of a specific module. | SOC_MODULE_ATTR(GPTIMER, TIMERS_TOTAL) |
SOC_MODULE_SUPPORT |
Checks if the current SoC supports a specific feature. | SOC_MODULE_SUPPORT(GPTIMER, ETM) |