Jiang Jiang Jian 40feb79578 Merge branch 'feat/support_esp32s31_xtal_fosc_force_pu_v6.1' into 'release/v6.1' ...

feat: update XTAL sleep FPU parameters to save power (v6.1)

See merge request espressif/esp-idf!51896

2026-08-31 10:54:55 +08:00

..

lp_core

Merge branch 'fix/lp_periph_init_fail_with_cpp_v6.1' into 'release/v6.1'

2026-08-27 16:22:23 +08:00

ulp_fsm

test(ulp): added larger delay in ULP FSM I_WR_REG instruction test

2025-11-17 16:03:21 +08:00

ulp_riscv

fix(ulp): make LP peripheral default config macros C++ compatible

2026-06-30 15:39:36 +02:00

.build-test-rules.yml

feat(esp_system): support XTAL as RTC fast clock source

2026-08-20 10:42:14 +08:00