Marius Vikhammer c3680793ad test(ulp): added larger delay in ULP FSM I_WR_REG instruction test ...

Test is flakey, could possibly be due to the ULP occasionally needing
a bit more time to start up.

2025-11-17 16:24:35 +08:00

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cmake

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ld

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lp_core

fix(ulp): Fix accumulation of wakeup cause bits in ULP

2025-04-18 16:02:24 +03:00

test_apps

test(ulp): added larger delay in ULP FSM I_WR_REG instruction test

2025-11-17 16:24:35 +08:00

ulp_common

change(ulp): added test for ulp adc init/deinit

2024-01-15 11:10:28 +08:00

ulp_fsm

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ulp_riscv

fix(esp_hw_support): fix esp32s2/esp32s3 RTC IOMUX clock management

2025-02-21 10:18:27 +08:00

CMakeLists.txt

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component_ulp_common.cmake

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esp32ulp_mapgen.py

feat(tools): Enforce utf-8 encoding with open() function

2025-01-02 16:12:47 +01:00

Kconfig

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project_include.cmake

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sdkconfig.rename.esp32

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sdkconfig.rename.esp32s2

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