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https://github.com/espressif/esp-idf.git
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a1cbc20a91
Replaced per-target bootloader.ld.in with bootloader.memory.ld.in and bootloader.sections.ld.in. Common code moved to file bootloader.sections.common.ld Unify ESP32-P4 ECO4- and ECO4+ linker scripts into one shared script Revision-specific code is selected with CONFIG_ESP32P4_SELECTS_REV_LESS_V3
87 lines
3.9 KiB
Plaintext
87 lines
3.9 KiB
Plaintext
/*
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* SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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/** Simplified memory map for the bootloader.
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* Make sure the bootloader can load into main memory without overwriting itself.
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*
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* ESP32-C6 ROM static data usage is as follows:
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* - 0x4086ad08 - 0x4087c610: Shared buffers, used in UART/USB/SPI download mode only
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* - 0x4087c610 - 0x4087e610: PRO CPU stack, can be reclaimed as heap after RTOS startup
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* - 0x4087e610 - 0x40880000: ROM .bss and .data (not easily reclaimable)
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*
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* The 2nd stage bootloader can take space up to the end of ROM shared
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* buffers area (0x4087c610).
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*/
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/* We consider 0x4087c610 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg,
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* and work out iram_seg and iram_loader_seg addresses from there, backwards.
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*/
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/* These lengths can be adjusted, if necessary: */
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bootloader_usable_dram_end = 0x4087c610;
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bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */
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bootloader_dram_seg_len = 0x5000;
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bootloader_iram_loader_seg_len = 0x7000;
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bootloader_iram_seg_len = 0x2D00;
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/* Start of the lower region is determined by region size and the end of the higher region */
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bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead;
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bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len;
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bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len;
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bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len;
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MEMORY
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{
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iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len
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iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len
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dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len
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}
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/* The app may use RAM for static allocations up to the start of iram_loader_seg.
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* If you have changed something above and this assert fails:
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* 1. Check what the new value of bootloader_iram_loader_seg start is.
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* 2. Update the value in this assert.
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* 3. Update SRAM_DRAM_END in components/esp_system/ld/esp32c6/memory.ld.in to the same value.
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*/
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ASSERT(bootloader_iram_loader_seg_start == 0x4086E610, "bootloader_iram_loader_seg_start inconsistent with SRAM_DRAM_END");
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/**
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* Appendix: Memory Usage of ROM bootloader
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*
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* 0x4086ad08 ------------------> _dram0_0_start
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* | |
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* | |
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* | | 1. Large buffers that are only used in certain boot modes, see shared_buffers.h
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* | |
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* | |
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* 0x4087c610 ------------------> __stack_sentry
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* | |
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* | | 2. Startup pro cpu stack (freed when IDF app is running)
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* | |
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* 0x4087e610 ------------------> __stack (pro cpu)
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* | |
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* | |
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* | | 3. Shared memory only used in startup code or nonos/early boot*
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* | | (can be freed when IDF runs)
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* | |
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* | |
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* 0x4087f564 ------------------> _dram0_rtos_reserved_start
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* | |
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* | |
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* | | 4. Shared memory used in startup code and when IDF runs
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* | |
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* | |
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* 0x4087fab0 ------------------> _dram0_rtos_reserved_end
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* | |
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* 0x4087fce8 ------------------> _data_start_interface
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* | |
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* | | 5. End of DRAM is the 'interface' data with constant addresses (ECO compatible)
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* | |
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* 0x40880000 ------------------> _data_end_interface
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*/
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