Mahavir Jain ec3877cf6c fix(mbedtls): read crt bundle byte-wise to avoid misaligned flash access ...

The offset table and the per-cert length fields of the certificate
bundle were read through uint16_t*/uint32_t* casts, which compile to
halfword/word loads at addresses with no alignment guarantee: bundles
supplied via esp_crt_bundle_set() can start anywhere, and cert entries
are byte-packed, so their 16-bit fields land at arbitrary offsets.

On chips with SOC_CPU_MISALIGNED_ACCESS_ON_PMP_MISMATCH_ISSUE (DIG-694:
ESP32-C6/H2/H21) a misaligned load from memory-mapped flash can take a
spurious "Load access fault" when it sits within two instructions of an
access to a differently-permissioned region, observed as a crash in
esp_crt_check_bundle()/CA callback during TLS handshakes with a bundle
that happened to be placed at an odd address.

2026-09-04 11:06:54 +05:30

..

config

feat(mbedtls): Add PSA Crypto driver for external secure elements

2026-07-09 11:14:15 +05:30

esp_crt_bundle

fix(mbedtls): read crt bundle byte-wise to avoid misaligned flash access

2026-09-04 11:06:54 +05:30

esp_tee

feat(esp_tee): Remove unused components from the PSA Crypto library

2026-06-12 10:03:03 +05:30

mbedtls @ ce3f3485a1

test(mbedtls): add PSA RSA key generation test

2026-07-23 13:38:24 +08:00

port

fix(mbedtls/aes): fix ESP32-S2 Crypto DMA stall on PSRAM output with partial blocks

2026-08-25 14:50:15 +05:30

test_apps

test(mbedtls): add partial-block PSRAM coverage for AES and AES-GCM

2026-08-25 14:50:15 +05:30

CMakeLists.txt

fix(esp-tls): address MR review comments for SE PSA driver

2026-07-09 11:17:02 +05:30

Kconfig

fix(mbedtls): revert to non constant time rsa key gen

2026-07-23 13:38:24 +08:00

sdkconfig.rename

docs(esp-tls): clarify caller owns the PSA key in esp_key_config_t

2026-07-09 11:17:03 +05:30