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https://github.com/espressif/esp-idf.git
synced 2026-10-01 10:40:47 +03:00
Alexey Lapshin
631ad9033c
Validate linked RISC-V executables when CONFIG_COMPILER_ENABLE_RISCV_ZCMP is enabled on affected chips. Disassemble each function and reject mstatus.MIE clears that lack an earlier mintthresh write of 0xff. Handle csrrci, csrrw, and register-mask csrrc patterns while ignoring csrrs. Add build-only coverage for valid and invalid sequences with CMake v1 and v2. Stop the hardware stack guard before switching stacks during restart, and keep ZCMP disabled for TEE test apps that still require the workaround.
22 lines
595 B
Plaintext
22 lines
595 B
Plaintext
# TODO: Need to find a way to query the current core ID in
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# U-mode for multicore SoCs. Thus, TEE interrupt tests will
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# run only in unicore mode till then.
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CONFIG_FREERTOS_UNICORE=y
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# Enable LP core
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CONFIG_ULP_COPROC_ENABLED=y
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CONFIG_ULP_COPROC_RESERVE_MEM=8192
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CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=n
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# Enable SPIRAM
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CONFIG_SPIRAM=y
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# Custom partition table
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CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
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# TODO: IDF-14145
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CONFIG_COMPILER_ENABLE_RISCV_ZCMP=n
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