Jiang Jiang Jian f409428bf3 Merge branch 'bugfix/esp32c5_encrypted_flash_write_v6.0' into 'release/v6.0' ...

fix(spi_flash): Add CPU frequency switching during flash encrypted write (v6.0)

See merge request espressif/esp-idf!44304

2025-12-21 15:28:33 +08:00

..

include

Merge branch 'bugfix/esp32c5_encrypted_flash_write_v6.0' into 'release/v6.0'

2025-12-21 15:28:33 +08:00

ld

feat(soc): c61 eco3 soc header update

2025-05-26 16:04:18 +08:00

register/soc

fix(esp_system): fix mspi write stuck after cpu/digital reset on c5/c61

2025-12-10 12:21:55 +08:00

gpio_periph.c

refactor(gpio): split GPIO HAL into separate component

2025-12-08 14:33:26 +08:00

interrupts.c

feat(soc): c61 eco3 soc header update

2025-05-26 16:04:18 +08:00

ledc_periph.c

refactor(soc): reformat code with astyle

2024-11-22 11:09:38 +08:00

power_supply_periph.c

refactor(bod): Move brownout handling file from esp_system to esp_hw_support

2025-01-08 14:41:37 +08:00

sdio_slave_periph.c

fix(sdio): supported slave sdio on esp32c61

2025-07-18 09:29:37 +08:00

system_retention_periph.c

feat(timg): graduate the hal driver into a single component

2025-09-27 17:33:10 +08:00

temperature_sensor_periph.c

Revert "change(soc): fix idf_size error caused by ldgen to run success for ci pipeline"

2025-02-05 19:58:39 +08:00

uart_periph.c

feat(uart): add DTR and DSR signals support for UART

2025-08-05 16:45:46 +08:00