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9dff0c23b707e042421751ea712f706be394e7cd
esp-idf/components/esp_psram
History
Mahavir Jain 9dff0c23b7 docs(esp_psram): clarify carve-out location is at upper end of PSRAM 
The previous wording "top of PSRAM" was ambiguous: the carve-out is
actually mapped at the highest physical addresses of PSRAM (after the
rodata, text, and main heap mappings). Update the Kconfig help text for
SPIRAM_ENC_EXEMPT and SPIRAM_ENC_EXEMPT_SIZE, the External RAM
documentation, and the internal layout comment to say "upper end of PSRAM
(highest physical addresses)" instead.
2026-05-20 10:28:17 +05:30
..
device
fix(mspi): fixed possible boot failure in some builds when psram is enabled
2026-05-13 16:46:20 +08:00
esp32
feat(psram): allow PSRAM to enter halfsleep mode during light sleep
2026-02-28 22:33:34 +08:00
esp32c5
feat(mspi): supported psram & flash 120MHz timing tuning
2025-10-28 09:52:36 +08:00
esp32c61
feat(mspi): support 120MHz flash and psram for esp32c61
2026-01-21 14:38:04 +08:00
esp32h4
fix(clk): update H4 to use 64MHz clock for mspi
2026-01-04 14:07:01 +08:00
esp32p4
change(psram): use 200M as default
2025-11-17 16:25:57 +08:00
esp32s2
feat(psram): allow PSRAM to enter halfsleep mode during light sleep
2026-02-28 22:33:34 +08:00
esp32s3
fix(mspi): fixed possible boot failure in some builds when psram is enabled
2026-05-13 16:46:20 +08:00
esp32s31
feat(psram): support psram 100mhz
2026-04-03 10:01:31 +08:00
include
feat(esp_psram): add esp_psram_ptr_is_no_enc() helper
2026-05-20 10:28:06 +05:30
system_layer
docs(esp_psram): clarify carve-out location is at upper end of PSRAM
2026-05-20 10:28:17 +05:30
test_apps
ci(psram): enable xip psram test on h4
2026-04-28 09:37:03 +08:00
xip_impl
refactor(global): remove completed todos in the codebase
2025-12-15 22:40:15 +08:00
CMakeLists.txt
feat(ldo): Add ldo support for psram on esp32s31
2026-04-01 16:31:35 +08:00
Kconfig
feature: add ram loadable app support
2023-02-01 17:57:22 +08:00
Kconfig.spiram.common
docs(esp_psram): clarify carve-out location is at upper end of PSRAM
2026-05-20 10:28:17 +05:30
linker.lf
feat(ldo): Add ldo support for psram on esp32s31
2026-04-01 16:31:35 +08:00
project_include.cmake
feat(build): propagate compiler flags from files to toolchain.cmake
2025-11-14 21:04:54 +07:00
README.md
feat(mspi): supported mspi flash and psram isr
2025-12-26 01:04:45 +00:00
sdkconfig.rename.esp32s2
psram: remove CS/CLK pin settings in kconfig on ESP32S2/S3
2022-11-11 16:40:46 +08:00
sdkconfig.rename.esp32s3
psram: remove CS/CLK pin settings in kconfig on ESP32S2/S3
2022-11-11 16:40:46 +08:00

README.md

PSRAM MSPI Interrupt Handling

Overview

This file (system_layer/esp_psram_mspi.c) handles PSRAM-specific MSPI interrupt registration.

Chip Type MSPI_LL_INTR_SHARED Behavior
Shared IRQ 1 Register to shared MSPI dispatcher
Separate IRQ 0 Register standalone PSRAM ISR via esp_intr_alloc()

Documentation

For detailed architecture, flow diagrams, and API reference, see:

esp_hw_support/README.md - MSPI Interrupt Logic