mirror of
https://github.com/espressif/esp-idf.git
synced 2026-09-22 13:01:16 +03:00
The generated assembly emitted <name>_length immediately after the raw payload bytes, so the 32-bit word landed misaligned whenever the data size was not a multiple of 4. Consumers declare it as a 32-bit object (e.g. `extern const size_t <name>_length` in the ULP firmware loaders), so the compiler emits an alignment-assuming word load, which is a misaligned flash read prone to spurious load faults on chips with SOC_CPU_MISALIGNED_ACCESS_ON_PMP_MISMATCH_ISSUE (ESP32-C6/H2/H21).