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mirror of https://github.com/espressif/esp-idf.git synced 2026-06-08 14:16:35 +03:00
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87dba67ba4be69d099b2fc76f2d44e0da52e2ca5
esp-idf/components/riscv/include/riscv
History
Alexey Lapshin 31810ae993 feat(esp_libc): make picolibc default libc
2025-12-03 13:31:42 +07:00
..
csr_clic.h
fix(build): add workaround for cm.push that triggers interrupt
2025-09-24 21:30:56 +07:00
csr_dsp.h
feat(riscv): add support for the DSP coprocessor
2025-08-07 14:40:30 +08:00
csr_hwlp.h
fix(riscv): make HWLP feature use direct saving of lazy saving
2024-05-21 17:27:46 +08:00
csr_pie.h
feat(riscv): add support for PIE coprocessor and HWLP feature
2024-05-20 10:47:58 +08:00
csr.h
feat(cpu_region_protect): Extend PMP memprot for ESP32-P4 V3
2025-11-05 13:34:47 +05:30
encoding.h
change(esp_hw_support): disable CPU wait-for-event mode on cpu start
2025-01-14 21:34:44 +08:00
instruction_decode.h
refactor(tools): Tidy up core component files copyright ignore
2024-01-22 18:07:35 +08:00
interrupt.h
fix(interrupts): removed deprecated intr_types.h and interrupt_deprecated.h headers
2025-09-10 15:06:27 +08:00
rv_utils.h
feat(esp_libc): make picolibc default libc
2025-12-03 13:31:42 +07:00
rvruntime-frames.h
fix(freertos): fix xesppie registers save/restore
2025-08-25 11:58:21 +07:00
semihosting.h
semihosting: version 2
2022-05-05 09:12:42 +00:00
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