1f5cba3070
Rename the internal ULP child-build marker to __ULP_BUILDV2 so component CMake files make the build-system scope explicit. Document that the marker is currently set only by the IDF_BUILD_V2 ULP child path.
ESP Hardware Abstraction Layer for RTC Timer Peripherals
Note
This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
Overview
The esp_hal_rtc_timer component provides a unified Hardware Abstraction Layer for RTC Timer peripherals across all ESP-IDF supported targets. This HAL abstracts hardware differences between legacy RTC timer implementations (in RTC_CNTL peripheral) and modern low-power timer implementations, providing a consistent API for wakeup timer configuration and RTC time reading across different ESP chip families.
The component consolidates timer functionality from two different hardware implementations:
- SOC_RTC_TIMER_V1: Legacy RTC timer functionality in RTC_CNTL peripheral for ESP32, ESP32C2, ESP32C3, ESP32S2, ESP32S3
- SOC_RTC_TIMER_V2: LP timer peripheral for ESP32C5, ESP32C6, ESP32C61, ESP32H2, ESP32H21, ESP32H4, ESP32P4
- SOC_RTC_TIMER_V3: RTC timer peripheral for ESP32S31
Unified HAL API (All Chips)
- Wakeup timer configuration via
rtc_timer_hal_set_wakeup_time() - Wakeup timer clear/disarm via
rtc_timer_hal_clear_wakeup_time() - RTC time reading via
rtc_timer_hal_get_cycle_count()
Hardware-Specific LL API
- V1 Chips: Direct register access in RTC_CNTL peripheral
- V2 Chips: LP Timer peripheral with alarm target configuration and counter snapshot operations
Please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.