Files
esp-idf/components/esp_security/include/esp_crypto_periph_clk.h
radek.tandler ce27a6e7e0 fix(esp_security): Stop ECDSA and Key Manager resets from corrupting concurrent crypto
ECDSA enable pulses a reset that also holds SHA in reset, and SHA shares
its DMA with AES. Key Manager enable pulses a reset that also covers the
XTS-AES flash encryption key-usage selector. Neither path was serialized
against those victims, so a hardware ECDSA/HMAC/DS operation could
corrupt a concurrent SHA/AES transfer or an in-flight encrypted flash
read.

- Take the SHA/AES lock inside esp_crypto_ecdsa_lock_acquire(), before
  MPI, matching the DS lock order (sha_aes < mpi)
- Add esp_crypto_key_mgr_enable_periph_clk_no_reset() and switch ECDSA,
  HMAC and DS to it; they only need the key-usage selector writable
- Hold esp_crypto_key_manager_lock across those clock enable/disable
  pairs so selector writes stay serialized without resetting KM
2026-09-08 14:03:50 +05:30

93 lines
2.4 KiB
C

/*
* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Enable or disable the AES peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_aes_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the SHA peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_sha_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the MPI peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_mpi_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the ECC peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_ecc_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the HMAC peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_hmac_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the DS peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_ds_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the ECDSA peripheral clock
*
* @param enable true: enable; false: disable
*/
void esp_crypto_ecdsa_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the Key Manager peripheral clock
*
* When enable is true this also pulses the Key Manager reset. The caller must
* hold esp_crypto_key_manager_lock across the matching true/false pair, because
* that reset also covers the XTS-AES flash encryption key-usage selector.
*
* Prefer esp_crypto_key_mgr_enable_periph_clk_no_reset() when the caller only
* needs the key-usage selector writable (ECDSA/HMAC/DS).
*
* @param enable true: enable; false: disable
*/
void esp_crypto_key_mgr_enable_periph_clk(bool enable);
/**
* @brief Enable or disable the Key Manager clocks without resetting the peripheral
*
* Use this when a crypto accelerator only needs to write its own key-usage
* selector. Resetting would drop the XTS-AES flash encryption selector that
* MSPI may be using, and flash DMA does not take the Key Manager lock.
* The caller must still hold esp_crypto_key_manager_lock across the matching
* true/false pair to serialize selector writes.
*
* @param enable true: enable; false: disable
*/
void esp_crypto_key_mgr_enable_periph_clk_no_reset(bool enable);
#ifdef __cplusplus
}
#endif