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ECDSA enable pulses a reset that also holds SHA in reset, and SHA shares its DMA with AES. Key Manager enable pulses a reset that also covers the XTS-AES flash encryption key-usage selector. Neither path was serialized against those victims, so a hardware ECDSA/HMAC/DS operation could corrupt a concurrent SHA/AES transfer or an in-flight encrypted flash read. - Take the SHA/AES lock inside esp_crypto_ecdsa_lock_acquire(), before MPI, matching the DS lock order (sha_aes < mpi) - Add esp_crypto_key_mgr_enable_periph_clk_no_reset() and switch ECDSA, HMAC and DS to it; they only need the key-usage selector writable - Hold esp_crypto_key_manager_lock across those clock enable/disable pairs so selector writes stay serialized without resetting KM
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
/*
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* SPDX-FileCopyrightText: 2025-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Enable or disable the AES peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_aes_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the SHA peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_sha_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the MPI peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_mpi_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the ECC peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_ecc_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the HMAC peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_hmac_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the DS peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_ds_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the ECDSA peripheral clock
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_ecdsa_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the Key Manager peripheral clock
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*
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* When enable is true this also pulses the Key Manager reset. The caller must
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* hold esp_crypto_key_manager_lock across the matching true/false pair, because
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* that reset also covers the XTS-AES flash encryption key-usage selector.
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*
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* Prefer esp_crypto_key_mgr_enable_periph_clk_no_reset() when the caller only
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* needs the key-usage selector writable (ECDSA/HMAC/DS).
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_key_mgr_enable_periph_clk(bool enable);
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/**
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* @brief Enable or disable the Key Manager clocks without resetting the peripheral
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*
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* Use this when a crypto accelerator only needs to write its own key-usage
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* selector. Resetting would drop the XTS-AES flash encryption selector that
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* MSPI may be using, and flash DMA does not take the Key Manager lock.
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* The caller must still hold esp_crypto_key_manager_lock across the matching
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* true/false pair to serialize selector writes.
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*
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* @param enable true: enable; false: disable
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*/
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void esp_crypto_key_mgr_enable_periph_clk_no_reset(bool enable);
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#ifdef __cplusplus
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}
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#endif
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