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72a49ed53b1cd9cee7c1064364982fac44c38a4e
esp-idf
/
components
/
riscv
T
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Marius Vikhammer
and
Cursor
8f6ea2a1ba
test(ci): re-enable ESP32-H4 in core system test apps
...
Co-authored-by: Cursor <
cursoragent@cursor.com
>
2026-05-13 09:00:12 +08:00
..
include
test(ci): re-enable ESP32-H4 in core system test apps
2026-05-13 09:00:12 +08:00
ld
…
CMakeLists.txt
feat(esp_tee): Support for ESP32-C5 - the rest of the components
2025-08-13 14:08:59 +05:30
instruction_decode.c
…
interrupt_clic.c
fix(riscv): implement a workaround for Zcmp hardware bug
2026-04-10 15:03:09 +08:00
interrupt_intc.c
…
interrupt_plic.c
…
interrupt.c
…
linker.lf
refactor(esp32c61): bus_monitor backward compatible refactor
2025-04-08 22:50:04 +08:00
rv_utils.c
refactor(esp32c61): bus_monitor backward compatible refactor
2025-04-08 22:50:04 +08:00
vectors_clic.S
change(riscv): Remove redundant definition of MEMPROT_ISR
2025-08-04 11:43:01 +05:30
vectors_intc.S
refactor(esp_system): Update all references of the memory protection configs
2025-08-04 11:43:01 +05:30
vectors.S
fix(riscv): implement a workaround for Zcmp hardware bug
2026-04-10 15:03:09 +08:00
