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mirror of https://github.com/espressif/esp-idf.git synced 2026-10-01 02:30:52 +03:00
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6f25834da23af89d3ca5828c8556bf8cf51d04ef
esp-idf/components/ulp/ulp_riscv
T
History
hebinglin e16933fdcb fix(hal): fix the issue of dual-core contention for RTC_CNTL regs
2026-03-02 14:39:00 +08:00
..
include
fix(ulp): enable astyle linter and format ULP component
2024-01-22 11:43:38 +08:00
shared/include
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
ulp_core
fix(ulp): fix ULP RISC-V interrupt handler corrupting the stack
2025-03-10 18:07:26 +08:00
ulp_riscv_i2c.c
Merge branch 'fix/ulp_riscv_i2c_multi_byte_v5.3' into 'release/v5.3'
2024-07-25 16:24:18 +08:00
ulp_riscv_lock.c
ulp-riscv: added lock API to provide mutual exclusion when sharing variables between the main CPU and the ULP.
2022-08-05 18:16:31 +08:00
ulp_riscv.c
fix(hal): fix the issue of dual-core contention for RTC_CNTL regs
2026-03-02 14:39:00 +08:00
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