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57 lines
2.1 KiB
C
57 lines
2.1 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2026 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/dma2d_periph.h"
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#include "soc/dma2d_reg.h"
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#include "soc/interrupts.h"
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const dma2d_signal_conn_t dma2d_periph_signals = {
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.groups = {
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[0] = {
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.tx_irq_id = {
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[0] = ETS_DMA2D_OUT_CH0_INTR_SOURCE,
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[1] = ETS_DMA2D_OUT_CH1_INTR_SOURCE,
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[2] = ETS_DMA2D_OUT_CH2_INTR_SOURCE,
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[3] = ETS_DMA2D_OUT_CH3_INTR_SOURCE, // This channel only exists on P4 ver. >= 3.0
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},
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.rx_irq_id = {
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[0] = ETS_DMA2D_IN_CH0_INTR_SOURCE,
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[1] = ETS_DMA2D_IN_CH1_INTR_SOURCE,
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[2] = ETS_DMA2D_IN_CH2_INTR_SOURCE, // This channel only exists on P4 ver. >= 3.0
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}
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}
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}
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};
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/** DMA2D Registers to be saved during sleep retention
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*
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* DMA2D driver is implemented in the way that channels are used as a pool,
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* therefore, only general registers are needed to be saved during sleep retention.
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*
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* DMA2D_RST_CONF_REG,
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* DMA2D_INTR_MEM_START_ADDR_REG, DMA2D_INTR_MEM_END_ADDR_REG, DMA2D_EXTR_MEM_START_ADDR_REG, DMA2D_EXTR_MEM_END_ADDR_REG
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* DMA2D_OUT_ARB_CONFIG_REG, DMA2D_IN_ARB_CONFIG_REG
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*/
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#define DMA2D_RETENTION_REGS_CNT 7
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#define DMA2D_RETENTION_REGS_BASE DMA2D_RST_CONF_REG
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static const uint32_t dma2d_regs_map[4] = {0x7f, 0x0, 0x0, 0x0};
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static const regdma_entries_config_t dma2d_regdma_entries[] = {
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[0] = {
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.config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_DMA2D_LINK(0x00),
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DMA2D_RETENTION_REGS_BASE, DMA2D_RETENTION_REGS_BASE,
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DMA2D_RETENTION_REGS_CNT, 0, 0,
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dma2d_regs_map[0], dma2d_regs_map[1],
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dma2d_regs_map[2], dma2d_regs_map[3]),
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.owner = ENTRY(0),
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},
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};
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const dma2d_reg_retention_info_t dma2d_reg_retention_info = {
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.module = SLEEP_RETENTION_MODULE_DMA2D,
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.regdma_entry_array = dma2d_regdma_entries,
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.array_size = ARRAY_SIZE(dma2d_regdma_entries),
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};
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