Sudeep Mohanty 3b92ee04f0 fix(lp_core): fix LP UART IOMUX pin not bypassing LP GPIO Matrix for RX ...

On chips with SOC_LP_GPIO_MATRIX_SUPPORTED (esp32p4, esp32s31), when the
default IOMUX pin is used for LP UART, calling rtc_gpio_iomux_func_sel()
alone only selects the IOMUX function on the pad side but does not set
sig_in_sel=0 on the peripheral side. This leaves the LP UART RX input
still reading from the LP GPIO Matrix (where no signal is connected),
causing RX to receive nothing.

Apply the same fix that was already in the HP UART driver: use
rtc_gpio_iomux_input() / rtc_gpio_iomux_output() which additionally
configure the peripheral to bypass the LP GPIO Matrix for IOMUX pins.

2026-04-28 16:14:00 +02:00

..

include

feat(mailbox): define and implement a mailbox API with hardware and software support

2025-09-25 10:25:15 +08:00

lp_core

revert(ulp): drop lp timeout helper from backports

2026-03-20 16:44:14 +08:00

shared

Merge branch 'feature/improve_ulp_delay_api_v6.0' into 'release/v6.0'

2026-03-21 14:32:29 +08:00

lp_core_etm.c

feat(lp-core): added support for using ETM events as wake-up source

2024-07-08 11:04:34 +08:00

lp_core_i2c.c

fix(gpio): IO7 is not a LP IO anymore on C5 ECO2 chip

2025-04-18 19:03:08 +08:00

lp_core_mailbox_impl_hw.c

feat(mailbox): define and implement a mailbox API with hardware and software support

2025-09-25 10:25:15 +08:00

lp_core_mailbox_impl_sw.c

feat(mailbox): define and implement a mailbox API with hardware and software support

2025-09-25 10:25:15 +08:00

lp_core_mailbox.c

fix(lp_mailbox): Fixed LP mailbox operation when LP core interrupts are enabled

2026-01-09 09:10:54 +01:00

lp_core_spi.c

feat(lp-spi): Added support for LP SPI driver to the LP Core on esp32p4

2024-06-26 13:43:55 +02:00

lp_core_uart.c

fix(lp_core): fix LP UART IOMUX pin not bypassing LP GPIO Matrix for RX

2026-04-28 16:14:00 +02:00

lp_core.c

change(esp_hal_rtc_timer): unify lp_timer/rtc_timer naming to RTC_TIMER

2026-01-31 22:31:34 +08:00