Sudeep Mohanty 2d3acb0805 fix(lp_core): fix LP UART IOMUX pin not bypassing LP GPIO Matrix for RX ...

On chips with SOC_LP_GPIO_MATRIX_SUPPORTED (esp32p4, esp32s31), when the
default IOMUX pin is used for LP UART, calling rtc_gpio_iomux_func_sel()
alone only selects the IOMUX function on the pad side but does not set
sig_in_sel=0 on the peripheral side. This leaves the LP UART RX input
still reading from the LP GPIO Matrix (where no signal is connected),
causing RX to receive nothing.

Apply the same fix that was already in the HP UART driver: use
rtc_gpio_iomux_input() / rtc_gpio_iomux_output() which additionally
configure the peripheral to bypass the LP GPIO Matrix for IOMUX pins.

2026-04-28 11:51:55 +02:00

..

include

feat(vad): lp vad driver and wakeup feature

2024-10-16 17:27:27 +08:00

lp_core

change(lp-core): Update LP I2C and LP UART drivers to use raw interrupt status

2025-05-19 10:33:21 +02:00

shared

change(lp_adc): Cleanup LP ADC driver and example

2026-02-09 12:37:57 +01:00

lp_core_etm.c

feat(lp-core): added support for using ETM events as wake-up source

2024-07-08 11:04:34 +08:00

lp_core_i2c.c

change(ulp): bu lp i2c on esp32c5

2024-08-01 14:48:31 +08:00

lp_core_spi.c

feat(lp-spi): Added support for LP SPI driver to the LP Core on esp32p4

2024-06-26 13:43:55 +02:00

lp_core_uart.c

fix(lp_core): fix LP UART IOMUX pin not bypassing LP GPIO Matrix for RX

2026-04-28 11:51:55 +02:00

lp_core.c

fix(lp_core): fixed array-bound warning when compiling on P4 with -Os

2025-08-29 13:17:53 +08:00