Files
esp-idf/components/esp_psram
Wu Zheng Hui d26f5682cf Merge branch 'change/change_regdma_malloc_caps' into 'master'
change(heap): reserve DMA pool with low priority MALLOC_CAP_DEFAULT cap

See merge request espressif/esp-idf!50255
2026-07-09 19:32:56 +08:00
..
2023-02-01 17:57:22 +08:00

PSRAM MSPI Interrupt Handling

Overview

This file (system_layer/esp_psram_mspi.c) handles PSRAM-specific MSPI interrupt registration.

Chip Type MSPI_LL_INTR_SHARED Behavior
Shared IRQ 1 Register to shared MSPI dispatcher
Separate IRQ 0 Register standalone PSRAM ISR via esp_intr_alloc()

Documentation

For detailed architecture, flow diagrams, and API reference, see:

esp_hw_support/README.md - MSPI Interrupt Logic