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esp-idf/components/esp_psram
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Michael (XIAO Xufeng) b61f940191 Merge branch 'fix/min_rev_usage' into 'master' 
fix: fix wrong REV_MIN usage for security, bt, efuse

See merge request espressif/esp-idf!45219
2026-01-22 21:25:57 +08:00
..
device
fix(clk): update H4 to use 64MHz clock for mspi
2026-01-04 14:07:01 +08:00
esp32
fix(psram): fixed requirement on esp_driver_gpspi on esp32
2026-01-19 01:23:14 +00:00
esp32c5
feat(mspi): supported psram & flash 120MHz timing tuning
2025-10-28 09:52:36 +08:00
esp32c61
feat(mspi): support 120MHz flash and psram for esp32c61
2026-01-21 14:38:04 +08:00
esp32h4
fix(clk): update H4 to use 64MHz clock for mspi
2026-01-04 14:07:01 +08:00
esp32p4
change(psram): use 200M as default
2025-11-17 16:25:57 +08:00
esp32s2
refactor(psram): cleanup psram component code structure
2025-03-20 15:17:01 +08:00
esp32s3
feat(driver_spi): split spi hal component
2025-12-11 15:00:18 +08:00
include
fix(psram): cleanup PSRAM_MSPI_MB_WORKAROUND to avoid future issue
2026-01-22 02:55:12 +08:00
system_layer
fix: fix psram, rtc_clk on P4 v3.1
2026-01-19 22:32:20 +08:00
test_apps
feat(mspi): support 120MHz flash and psram for esp32c61
2026-01-21 14:38:04 +08:00
xip_impl
refactor(global): remove completed todos in the codebase
2025-12-15 22:40:15 +08:00
CMakeLists.txt
fix(psram): fixed requirement on esp_driver_gpspi on esp32
2026-01-19 01:23:14 +00:00
Kconfig
feature: add ram loadable app support
2023-02-01 17:57:22 +08:00
Kconfig.spiram.common
fix(esp_psram): make SPIRAM_USE_MEMMAP available for all targets
2025-10-24 14:21:14 +05:30
linker.lf
feat(esp_psram): Add a new API to just detect and enable the PSRAM
2025-04-29 11:48:27 +05:30
project_include.cmake
feat(build): propagate compiler flags from files to toolchain.cmake
2025-11-14 21:04:54 +07:00
README.md
feat(mspi): supported mspi flash and psram isr
2025-12-26 01:04:45 +00:00
sdkconfig.rename.esp32s2
psram: remove CS/CLK pin settings in kconfig on ESP32S2/S3
2022-11-11 16:40:46 +08:00
sdkconfig.rename.esp32s3
psram: remove CS/CLK pin settings in kconfig on ESP32S2/S3
2022-11-11 16:40:46 +08:00

README.md

PSRAM MSPI Interrupt Handling

Overview

This file (system_layer/esp_psram_mspi.c) handles PSRAM-specific MSPI interrupt registration.

Chip Type MSPI_LL_INTR_SHARED Behavior
Shared IRQ 1 Register to shared MSPI dispatcher
Separate IRQ 0 Register standalone PSRAM ISR via esp_intr_alloc()

Documentation

For detailed architecture, flow diagrams, and API reference, see:

esp_hw_support/README.md - MSPI Interrupt Logic